S.J. Koester, K.L. Saenger, et al.
IEEE Electron Device Letters
In this letter, we present results of enhancement and depletion mode transistors fabricated on the same layer structure of Si/SiGe, without using gate recess. The current in the enhancement mode device is controlled by a pn-junction, while that of the depletion-mode device is controlled by a Schottky barrier. A peak transconductance of 327 mS/mm and 417 mS/mm has been achieved in 0.5-μm gate length depletion and enhancement-mode transistors, respectively.
S.J. Koester, K.L. Saenger, et al.
IEEE Electron Device Letters
P.M. Mooney, J.L. Jordan-Sweet, et al.
Applied Physics Letters
P.M. Mooney, G.M. Cohen, et al.
MRS Proceedings 2004
E.F. Crabbé, B. Mcyerson, et al.
Device Research Conference 1993