Conference paper
Internet of the Body and Cognitive Hypervisor
R. Strassle, S. Gerke, et al.
CHASE 2017
A -3.3-V half-rate clock 4:1 multiplexer implemented in a 210-GHz f T 0.13-μm SiGe-bipolar technology and operating up to 132 Gb/s is reported. Among many design challenges, the control of on-chop clock distribution was critical to achieve such a high data rate. At 100 Gb/s, the chip operates reliably down to -3.0-V supply voltage and up to 100°C chip temperature. The circuit consumes 1.45 W from a -3.3-V supply voltage and exhibits less than 340-fs rms jitter on the output data.
R. Strassle, S. Gerke, et al.
CHASE 2017
Daniel M. Kuchta, Jonathan E. Proesel, et al.
OFC 2019
Mounir Meghelli
CSICS 2004
Timothy Dickson, Zeynep Deniz, et al.
VLSI Technology and Circuits 2022