SiGe Channel for Scaled Gate-All-Around Nanosheet pFET Transistor for Advanced Logic Applications
- Shogo Mochizuki
- Sushant Kumar
- et al.
- 2025
- IEDM 2025
J. has authored or co-authored more than 70 papers and 45 patents in semiconductors, microscopy, and characterization techniques. He has held adjunct faculty positions at Rensselaer Polytechnic Institute (RPI) in Troy, NY USA. J. is a Past President of Electronic Device Failure Analysis Society and a Fellow of ASM International.