Krishnan Kailas

contact information

Senior Research Scientist
Thomas J. Watson Research Center, Yorktown Heights, NY USA
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Professional Associations

Professional Associations: ACM | IEEE | Sigma Xi

3-D Stacked Multiprocessor Structures and Methods for Multimodal Operation of Same
9/13/2016 Issued as US Patent 9,442,884 (Buyuktosunoglu, A. Emma, P. Healy, M. B. Hartstein, A., Krishnan Kailas)

Three-Dimensional Processing System Having Independent Calibration and Statistical Collection Layers
7/12/2016 Issued as US Patent 9,389,876 (Buyuktosunoglu, A. Emma, P. Healy, M. B. Hartstein, A., Krishnan Kailas)

Three-Diimensional Processing System Having at Least One Layer with Circuitry Dedicated to Scan Testing and System State Checkpointing of Other System Layers
7/5/2016 Issued as US Patent 9,383,411 (Buyuktosunoglu, A. Emma, P. Healy, M. B. Hartstein, A., Krishnan Kailas)

3-D Stacked Multiprocessor Structure with Vertically Aligned Layout Operating Processors in Independent Mode or in Sharing Mode Running Faster Components
3/29/2016 Issued as US Patent 9,298,672 (Buyuktosunoglu, A. Emma, P. Healy, M. B. Hartstein, A., Krishnan Kailas)

Three-Dimensional Computer Processor Systems Having Multiple Local Power and Cooling Layers and a Global Interconnection Structure
11/24/2015 Issued as US Patent 9,195,630 (Buyuktosunoglu, A. Emma, P. Healy, M. B. Hartstein, A., Krishnan Kailas)

Memory Architectures Having Wiring Structures that Enable Different Access Patterns in Multiple Dimensions
11/17/2015 Issued as US Patent 9,190,118 (Buyuktosunoglu, A. Emma, P. Healy, M. B. Hartstein, A., Krishnan Kailas)

Enhanced Case-splitting based Property Checking
03/10/2015 Issued as US Patent 8,978,001 and 8,997,030 (Krishnan Kailas, Hari Mony)

3-D Stacked Multiprocessor Structures and Methods To Enable Reliable Operation Of Processors At Speeds Above Specified Limits
08/05/2014 Issued as US Patent 8,799,710 and 8,826,073 (Buyuktosunoglu, A. Emma, P. Healy, M. B. Hartstein, A., Krishnan Kailas)
Method and Structure for Provably Fair Random Number Generator
11/13/2012 Issued as US Patent 8,312,071 and 9,063,807(Krishnan Kailas, Brian Monwai, Viresh Paruthi)

Method and Apparatus for Fast Synchronization and Out-of-order Execution of Instructions in a Meta-program based Computing System
10/30/2012 Issued as US Patent 8,301,870 (Krishnan Kailas)
Method and Apparatus for Application-specific Dynamic Cache Placement
11/16/2010 Issued as US Patent 7,836,256 (Krishnan Kailas, Rajiv Ravindran, Zehra Sura)
Bounded Starvation Checking of an Arbiter Using Formal Verification
07/06/2010 Issued as US Patent 7,752,369 (Krishnan Kailas, Brian Monwai, Viresh Paruthi)
Method and System for Tracking Instruction Dependency in an Out-of-Order Processor
05/04/2010 Issued as US Patent 7,711,929 (Bill Burky, Krishnan Kailas)
Method and apparatus for a computing system using meta program representation
02/16/2010 Issued as US Patent 7,665,070 (Krishnan Kailas)
Method and system for dependency tracking and flush recovery for an out-of-order microprocessor
02/09/2010 Issued as US Patent 7,660,971 (Vikas Agarwal, Bill Burky, Krishnan Kailas, Balaram Sinharoy)
Method and apparatus for register renaming using multiple physical register files and avoiding associative search
03/17/2009 Issued as US Patent 7,506,139 (Bill Burky, Krishnan Kailas, Balaram Sinharoy)
Method and apparatus for dynamic priority-based cache replacement
03/10/2009 Issued as US Patent 7,502,890 (Krishnan Kailas, Rajiv Ravindran, Zehra Sura)
Method and apparatus for providing fast remote register access in a clustered VLIW processor using partitioned register files
01/27/2009 Issued as US Patent 7,484,075 (Krishnan Kailas)
Computer processing system employing an instruction schedule cache
01/02/2009 Issued as US Patent 7,454,597 (Krishnan Kailas, Ravi Nair, Sumedh Sathaye, Wolfram Sauer, J-D Wellman)