3-D Die Stacking with 55 μm Pitch Interconnections on Advanced Ground-Rule Laminate for Artificial Intelligence System
- Katsuyuki Sakuma
- Mukta Farooq
- et al.
- 2021
- IEEE Transactions on CPMT
Publications
60 results for Chiplets
Packaging and Antenna Integration for Silicon-Based Millimeter-Wave Phased Arrays: 5G and Beyond
- Xiaoxiong Gu
- Duixian Liu
- et al.
- 2021
- IEEE Journal of Microwaves
Optical Communication and Energy Conversion for Small-Footprint Edge Computing
- Ning Li
- 2020
- MRS Spring/Fall Meeting 2020
Plating-free Bumping by Cu Nanopaste and Injection Molded Solder (IMS) for Fine Pitch Flip Chip Joining
- Toyohiro Aoki
- Eiji Nakamura
- et al.
- 2020
- ECTC 2020
Detection of Printable EUV Mask Absorber Defects and Defect Adders by Full Chip Optical Inspection of EUV Patterned Wafers
- Luciana Meli
- Ravi Bonam
- et al.
- 2017
- IEEE Trans Semicond Manuf
Proposal of Package Structure Requirements for Effective Cooling from the Bottom Side of Chips (from the Substrate Side), Aiming for a Three-Dimensional (3D) Chip Stack
- Keiji Matsumoto
- Hiroyuki Mori
- 2016
- ECTC 2016
Detection of printable EUV mask absorber defects and defect adders by full chip optical inspection of EUV patterned wafers
- Luciana Meli
- Scott D. Halle
- et al.
- 2016
- ASMC 2016
Essential edge protection techniques for successful multi-wafer stacking
- Joshua Rubin
- Kevin Winstel
- et al.
- 2015
- S3S 2015
Warpage analysis of organic substrates for 2.1D packaging
- Sayuri Kohara
- Keishi Okamoto
- et al.
- 2015
- 3DIC 2015
Advances in percolated thermal underfill (PTU) simulations for 3D-integration
- Sridhar Kumar
- Uwe Zschenderlein
- et al.
- 2015
- EuroSimE 2015