Challenges and solutions of FinFET integration in an SRAM cell and a logic circuit for 22 nm node and beyondH. KawasakiV.S. Baskeret al.2009IEDM 2009
Performance-aware corner model for design for manufacturingChung-Hsun LinMohan V. Dungaet al.2009IEEE Transactions on Electron Devices
VDD scaling for FinFET logic and memory circuits: The impact of process variations and SRAM stabilityC.-H. LinK. Daset al.2006VLSI-TSA 2006
Compact modeling of FinFETs featuring independent-gate operation modeC.-H. LinX. Xiet al.2005VLSI Technology 2005