Conference paperWave-based device scaling concept for brain-like energy efficiency and integrationYasunao Katayama, Toshiyuki Yamane, et al.NANOARCH 2015
Conference paperBrain-inspired memory architecture for sparse nonlocal and unstructured workloadsYasunao KatayamaCF 2017
PaperA 22-ns 1-Mbit CMOS High-Speed DRAM with Address MultiplexingNicky C.C. Lu, Gary B. Bronner, et al.IEEE Journal of Solid-State Circuits
Conference paperUniversal optical multi-drop bus for heterogeneous memory architectureAtsuya Okazaki, Yasunao Katayama, et al.CF 2011