FPGA-based coprocessor for text string extraction
N.K. Ratha, A.K. Jain, et al.
Workshop CAMP 2000
We study the problem of designing a layout of virtual paths (VP's) on a given ATM network. We first define a mathematical model that captures the characteristics of virtual paths. In this model, we define the general VP layout problem, and a more restricted case; while the general case layout should cater connections between any pair of nodes in the network, the restricted case layout should only cater connections between a specific node to the other nodes. For the latter case, we present an algorithm that finds a layout by decomposing the network into subnetworks and operating on each subnetwork, recursively; we prove an upper bound on the optimality of the resulting layout and a matching lower bound for the problem, that are tight under certain realistic assumptions. Finally, we show how the solution for the restricted case is used as a building block in various solutions to more general cases (trees, meshes, K-separable networks, and general topology networks) and prove a lower bound for some of our results. The results exhibit a trade-off between the efficiency of the call setup and both the utilization of the VP routing tables and the overhead during recovery from link disconnections. © 1996 IEEE.
N.K. Ratha, A.K. Jain, et al.
Workshop CAMP 2000
Kafai Lai, Alan E. Rosenbluth, et al.
SPIE Advanced Lithography 2007
A. Gupta, R. Gross, et al.
SPIE Advances in Semiconductors and Superconductors 1990
Fan Zhang, Junwei Cao, et al.
IEEE TETC