Conference paper
FinFET SRAM design
Rajiv Joshi, Keunwoo Kim, et al.
VLSID/Embedded 2010
This paper describes modeling and hardware results of how the soft-error rate (SER) of a 65-nm silicon-on-insulator SRAM memory cell changes over time, as semiconductor aging effects shift the SRAM cell behavior. This paper also describes how the SER changes in the presence of systematic and random manufacturing variation. © 2008 IEEE.
Rajiv Joshi, Keunwoo Kim, et al.
VLSID/Embedded 2010
Rouwaida Kanj, Rajiv Joshi, et al.
ISLPED 2010
Rajiv V. Joshi, Rouwaida Kanj, et al.
IEEE Trans Semicond Manuf
Ethan H. Cannon, Michael S. Gordon, et al.
IRPS 2008