Conference paper
Investigations of silicon nano-crystal floating gate memories
Arvind Kumar, Jeffrey J. Welser, et al.
MRS Spring 2000
An I/O assembly has been designed and constructed to support the operation of superconducting circuitry. The system, previously described9 for chip testing, has been adapted for use with a Josephson technology system level experiment. The cryoinsert assembly, constructed of non-magnetic parts, provides 80 high frequency I/O lines between room temperature and 4.2 K. © 1983.
Arvind Kumar, Jeffrey J. Welser, et al.
MRS Spring 2000
Andreas C. Cangellaris, Karen M. Coperich, et al.
EMC 2001
Thomas E. Karis, C. Mark Seymour, et al.
Rheologica Acta
J.C. Marinace
JES