Conference paperSimulation of 3D Doping by Plasma Immersion Ion Implantation for FinFET or deep Trench Doping Applications. Effect of main Process Parameters and Study of Wall Doping Non-Uniformity as Function of Form Factor and Device ScalingFrank Torregrosa, Benjamin Roux, et al.IIT 2018
Conference paperChip-level power-performance optimization through thermally-driven across-chip variation (ACV) reductionX. Yu, Oleg Gluschenkov, et al.IEDM 2011
Conference paperImproved frequency response in a SiGe npn device through improved dopant activationJim Adkisson, Marwan H. Khater, et al.ECS Meeting 2012
Conference paperAdvanced BEOL Materials, Processes, and Integration to Reduce Line Resistance of Damascene Cu, Co, and Subtractive Ru InterconnectsTakeshi Nogami, Oleg Gluschenkov, et al.VLSI Technology and Circuits 2022
