Giulio Antonini, Jonas Ekman, et al.
IEEE Topical Meeting EPEPS 2007
The large number of coupled lines in an interconnect structure is a serious limiting factor in simulating high-speed circuits. A new method is presented for efficient simulation of large interconnects based on transverse partitioning and waveform relaxation techniques. The computational cost of the proposed algorithm grows linearly with the number of coupled lines. In addition, the algorithm is highly suitable for parallel implementation leading to further significant reduction in the computational complexity. © 2006 IEEE.
Giulio Antonini, Jonas Ekman, et al.
IEEE Topical Meeting EPEPS 2007
Chung W. Ho, David A. Zein, et al.
IEEE Transactions on Circuits and Systems
Arvind R. Sridhar, Natalie M. Nakhla, et al.
IEEE Trans Electromagn Compat
Dipanjan Gope, Albert E. Ruehli, et al.
IEEE Transactions on VLSI Systems