Investigations of silicon nano-crystal floating gate memories
Arvind Kumar, Jeffrey J. Welser, et al.
MRS Spring 2000
Hot-carrier degradation and bias-temperature instability of FinFET and fully-depleted SOI devices with high-k gate dielectrics and metal gates are investigated. Thinner SOI results in increased hot-carrier degradation, which can be recovered by junction engineering. FinFETs with (1 1 0) Si active surfaces exhibit degradation of sub-threshold swing after hot carrier stress, indicating generation of interface states. The effect of duty cycle on bias-temperature instability modulates the quasi-steady-state trap occupancy over a broad distribution of electron trapping and de-trapping times. Only the deeper traps remain filled for low duty cycle, and shallower traps are emptied during AC stress. © 2010 Elsevier Ltd. All rights reserved.
Arvind Kumar, Jeffrey J. Welser, et al.
MRS Spring 2000
S. Cohen, T.O. Sedgwick, et al.
MRS Proceedings 1983
Thomas E. Karis, C. Mark Seymour, et al.
Rheologica Acta
T.N. Morgan
Semiconductor Science and Technology