Amnon Joseph, Ron Y. Pinter
Integration, the VLSI Journal
Chaining is the ability to pipeline two or more vector instructions on Cray-1 like machines. We show how to optimally use this feature to compute (vector) expression trees in the context of automatic code generation. We present a linear time scheduling algorithm for finding an optimal order of evaluation for a machine with a bounded number of registers. © 1988 IEEE
Amnon Joseph, Ron Y. Pinter
Integration, the VLSI Journal
David Bernstein, Michael Rodeh, et al.
Journal of Algorithms
David Bernstein, Haran Boral, et al.
SIGPLAN Symposium on Compiler Construction 1986
David Bernstein, Izidor Gertner
ACM Transactions on Programming Languages and Systems (TOPLAS)