Shu-Jen Han, Dharmendar Reddy, et al.
ACS Nano
A new experimental complimentary metal-oxide semiconductor (CMOS) technology is presented, fabricated with Schottky source and drain and a T-shaped gate. The process results in a significant reduction in the number of steps required to fabricate CMOS, and no longer relies on implantation of the source and drain. The gate resistance and the source/drain contact resistance are very low compared to conventional designs. Performance of 0.25 and 0.15 μm channel length devices has been measured and the technology is readily scalable to sub-0.1 μm dimensions. © 1997 American Vacuum Society.
Shu-Jen Han, Dharmendar Reddy, et al.
ACS Nano
Andreas C. Cangellaris, Karen M. Coperich, et al.
EMC 2001
H.D. Dulman, R.H. Pantell, et al.
Physical Review B
Sang-Min Park, Mark P. Stoykovich, et al.
Advanced Materials