Chi-Leung Wong, Zehra Sura, et al.
I-SPAN 2002
This paper examines the apparent limits, possible extensions, and applications of CMOS technology in the nanometer regime. Starting from device scaling theory and current industry projections, we analyze the achievable performance and possible limits of CMOS technology from the point of view of device physics, device technology, and power consumption. Various possible extensions to the basic logic and memory devices are reviewed, with emphasis on novel devices that are structurally distinct from conventional bulk CMOS logic and memory devices. Possible applications of nanoscale CMOS are examined, with a view to better defining the likely capabilities of future microelectronic systems. This analysis covers both data processing applications and nondata processing applications such as RF and imaging. Finally, we speculate on the future of CMOS for the coming 15-20 years.
Chi-Leung Wong, Zehra Sura, et al.
I-SPAN 2002
Renu Tewari, Richard P. King, et al.
IS&T/SPIE Electronic Imaging 1996
Bowen Zhou, Bing Xiang, et al.
SSST 2008
Beomseok Nam, Henrique Andrade, et al.
ACM/IEEE SC 2006