Emrah Acar, Kanak Agarwal, et al.
ISCAS 2006
Power grids for sub-micron large integrated circuits are performance limiting factors due to the large power dissipated (e.g. 100 W at 1.8 V). The analysis of such power grids is important in order to predict and possibly improve the performance. Current classical analysis methods are falling behind as grids become ever larger. This paper proposes a new efficient analysis method suitable for both DC and transient simulation of large power grids.
Emrah Acar, Kanak Agarwal, et al.
ISCAS 2006
Di-An Li, Malgorzata Marek-Sadowska, et al.
IEEE Transactions on VLSI Systems
Sani R. Nassif, Gi-Joon Nam, et al.
ISQED 2013
Wei Zhao, Frank Liu, et al.
IEEE Trans Semicond Manuf