J.P. Reithmaier, R.F. Broom, et al.
Applied Physics Letters
Conference paper
Model for a 15ns 16K RAM with Josephson junctions
Abstract
A RAM cross section, intended as a feasibility model for a 16K bit memory with an access time of approximately 15ns, has been developed. The design, including array, drivers and decoders, will be described and test results offered.
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