Ullrich R. Pfeiffer, David Goren
IEEE Journal of Solid-State Circuits
In this paper an on-chip pad structure with minimized losses and matched impedance is presented. The pads use a metal ground-shield thereunder to minimize the influence from a lossy silicon substrate. A shunt transmission line stub is used to resonate the pad capacitance, thereby providing a matched impedance into a 50 Ω on-chip transmission line. A second-tier calibration technique was used to extract their 2-port S-parameter characteristic. The measured performance is compared with simulations of standard pad structures up to 65 GHz. © 2005 IEEE.
Ullrich R. Pfeiffer, David Goren
IEEE Journal of Solid-State Circuits
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