Scott K. Reynolds, Arun S. Natarajan, et al.
RFIC 2010
The effect of gate resistance on the high frequency device properties of graphene transistors is explored. Decreasing this resistance does not alter the current gain cutoff frequency (f T), but it does allow for the power gain cutoff frequency (f max) to be increased. Analysis of this effect reveals that the relative rate of change between f T and f max is most sensitive to the relationship between the parasitic resistance in the device channel and the output conductance, a manifestation of device scaling in the triode regime. This result underlies the importance of a small output conductance in the scaling of graphene transistors. © 2012 American Institute of Physics.
Scott K. Reynolds, Arun S. Natarajan, et al.
RFIC 2010
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IEEE Design and Test
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