Armando J. Argumedo, David Berman, et al.
IBM J. Res. Dev
We present a reverse concatenation (RC) architecture using Reed-Solomon (RS) error-correction codes (ECCs). The scheme employs very-high-rate pre-RS modulation codes followed by RS parity symbol insertion. The very-high-rate modulation codes in the RC scheme, which facilitate timing recovery and automatic gain control and reduce the detector path memory, are of the same type as the modulation codes that have been used in generalized partial-response maximum-likelihood (PRML) detection systems. © 2007 IEEE.
Armando J. Argumedo, David Berman, et al.
IBM J. Res. Dev
Mario Blaum
IEEE Trans. Inf. Theory
Giovanni Cherubini, Roy D. Cideciyan, et al.
GLOBECOM 2009
Xiao-Yu Hu, Evangelos Eleftheriou, et al.
GLOBECOM 2001