Oliver Bodemer
IBM J. Res. Dev
The paper describes the need for early analysis tools to enable developers of today's system-on-a-chip (SoC) designs to take advantage of pre-designed components, such as those found in the IBM Blue Logic® Library, and rapidly explore high-level design alternatives to meet their system requirements. We report on a new approach for developing high-level performance models for these SoC designs and outline how this performance analysis capability can be integrated into an overall environment for efficient SoC design. © Copyright 2002 by International Business Machines Corporation.
Oliver Bodemer
IBM J. Res. Dev
B. Wagle
EJOR
J.P. Locquet, J. Perret, et al.
SPIE Optical Science, Engineering, and Instrumentation 1998
Donald Samuels, Ian Stobert
SPIE Photomask Technology + EUV Lithography 2007