Thuc-Quyen Nguyen, Richard Martel, et al.
JACS
The potential to perform at low voltages is a unique feature of carbon nanotube thin-film transistors (CNT-TFTs) when compared to more common TFT material options, such as amorphous Si or organic films. In this work, CNT-TFTs are fabricated using high-purity CNTs (verified electrically to be ∼ 99% semiconducting) on an embedded gate device structure, which allows for scaling of the dielectric (equivalent oxide thickness ∼ nm) and yields a high gate capacitance. The high gate capacitance, coupled with the high semiconducting purity, leads to devices with excellent low-voltage performance having an average subthreshold swing of ∼ 200 mV/decade (low of ∼ 90mV/decade) and on/off current ratios of 105. Testing hundreds of the CNT-TFTs on a chip at various channel lengths and widths provided a first look at the distribution of key performance metrics across a substrate. Favorable trade-offs between on-current and on/off current ratio were observed along with high field-effect mobility and narrow distributions in both the threshold voltage and subthreshold swing. The methods and results demonstrated here show that the low-voltage performance of CNT-TFTs is accessible for macroelectronic applications. © 2014 AIP Publishing LLC.
Thuc-Quyen Nguyen, Richard Martel, et al.
JACS
Yaron S. Cohen, Shengxiong Xiao, et al.
Nano Letters
George S. Tulevski, Qian Miao, et al.
JACS
Timothy A. Su, Haixing Li, et al.
JACS