Conference paper
CCD memory using multilevel storage
Lewis M. Terman, Yen S. Yee, et al.
ISSCC 1981
Paper
A 1 mV MOS Comparator
Abstract
An MOS comparator circuit capable of detecting difference signals as low as 1 mV in 3 µs has been designed, built, and tested. The circuit does not require high accuracy components or tight control of device parameter tolerances. © 1978, IEEE. All rights reserved.
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