Emrah Acar photo Solomon Assefa photo TYMON BARWICZ photo
William M. J. Green photo Jens Hofrichter photo Jonathan E. (Jon) Proesel photo
 Jessie C. Rosenberg photo Alexander V. Rylyakov photoYurii A. Vlasov photo
Chi Xiong photo

Research Areas

Additional information

2012 IEDM postdeadline paper


2012 CLEO Plenary talk


2012 IEEE Comm. Mag., Silicon Nanophotonics Beyond 100G


2011 IBM R&D Journal: Technologies for Exascale systems


2010 SEMICON Talk: CMOS Nanophotonics for Exascale


2008 ECOC Tutorial: On-Chip Si Nanophotonics

Project Name

Silicon Integrated Nanophotonics


On December 1, 2010 IBM announced a new technology developed for dense integration of electrical and optical devices on a silicon chip. The technology can change the way how computer chips talk to each other - they can use pulses of light rather than electrical signals that is a potentially cheaper, faster and less power consuming approach than electrical communications via copper wires and cables. This development is announced at the major semiconductor industry conference SEMICON 2010 in Tokyo as a part of invited presentation entitled "CMOS Integrated Silicon Nanophotonics: Enabling Technology for Exascale Computational Systems" co-authored by William Green, Solomon Assefa, Alexander Rylyakov, Clint Schow, Folkert Horst, and Yurii Vlasov

The CMOS Integrated Nanophotonics is a unique IBM technology developed over the last decade by IBM Research to integrate monolithically both the electrical circuits and optical circuits on the same silicon chip on the front-end of the standard CMOS line. Silicon transistors share the same silicon layer with silicon nanophotonics devices that are used for transporting light signals across the chip. Over several years IBM Research has developed a whole library of such front-end integrated ultra-compact active and passive silicon nanophotonics devices that are all scaled down to the diffraction limit – the smallest size that dielectric optics can afford.

Image Gallery. Click to enlarge

CMOS Integrated Nanophotonics Chip

CMOS Integrated Nanophotonics Chip

Figures captions



View of a CMOS Nanophotonics chip with multi-channel transceivers consisted of tightly integrated electrical and nanophotoncis circuits. An image of a finished 200mm wafer with CMOS Nanophotoncis circuits is overlaid on the background.

CMOS Integrated Nanophotonics Chip

CMOS Integrated Nanophotonics Chip

Figures captions



View of a CMOS Nanophotonics chip with multi-channel transceivers consisted of tightly integrated electrical and nanophotoncis circuits. An image of a finished 200mm wafer with CMOS Nanophotoncis circuits is overlaid on the background.