Martin Frank  Martin Frank photo       

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Research Staff Member
Thomas J. Watson Research Center, Yorktown Heights, NY, USA
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PUBLICATIONS

Books

V. Narayanan, M. M. Frank, A. A. Demkov (eds.), Thin Films on Silicon: Electronic and Photonic Applications, Series ‘Materials and Energy’, Vol. 8, ISBN 978-981-4740-47-0 (hardcover), 978-981-4740-49-4 (ebook), (World Scientific Publishing, Singapore, 2016). Link: http://www.worldscientific.com/worldscibooks/10.1142/9908

M. Frank, Vom Atom zum Kristallit – Struktur und Reaktivität oxidgetragener Metallpartikel (From atoms to crystallites – Structure and reactivity of oxide-supported metal particles), ISBN 3-89825-200-0 (dissertation.de, Berlin, 2000).

 

Edited conference proceedings volumes

P. McIntyre, J. Robertson, H. Hwang, M.M. Frank (eds.), Materials Research Society Symposia Proceedings 1790 ‘2015 MRS Spring Meeting, Symposium AA, Materials for Beyond the Roadmap Devices in Logic, Power and Memory’, MRS Online Proceedings Library (2015).

C. Claeys, A. Peaker, J. Fompeyrine, M. Frank, J. Vanhellemont (eds.), European Materials Research Society Symposia Proceedings 209 ‘E-MRS 2008 Spring Conference Symposium J. Beyond Silicon Technology: Materials and Devices for Post-Si CMOS’, Mater. Sci. Semicond. Proc. 11 (5-6) 147-410 (2008). Preface: Mater. Sci. Semicond. Proc. 11, 147 (2008).

M.M. Frank, A. Asenov, J. Fompeyrine, J.W. Seo, P. Ye (eds.), European Materials Research Society Symposia Proceedings 191 ‘E-MRS IUMRS ICEM 2006 Symposium B. From strained silicon to nanotubes – Novel channels for field effect devices’, Mater. Sci. Eng.: B 135 (3), 177-304 (2006). Preface: Mater. Sci. Eng.: B 135, 177-178 (2006).

 

Review articles and book chapters

T. Ando, U. Kwon, S. Krishnan, M. M. Frank, V. Narayanan, High-k oxides on Si: MOSFET gate dielectrics, in: V. Narayanan, M. M. Frank, A. A. Demkov (eds.), Thin Films on Silicon: Electronic and Photonic Applications, Series ‘Materials and Energy’, Vol. 8, ISBN 978-981-4740-47-0 (hardcover), 978-981-4740-49-4 (ebook), (World Scientific Publishing, Singapore, 2016), p. 323-367.

M.M. Frank, Y. Zhu, S.W. Bedell, T. Ando, V. Narayanan, Gate stacks for silicon, silicon germanium, and III-V channel MOSFETs, ECS Trans. 61 (2) 213-223 (2014).

T. Ando, M.M. Frank, E.A. Cartier, B.P. Linder, J. Rozen, K. Choi, V. Narayanan, Ultimate scaling of high-k gate dielectrics: Current status and challenges, Extended Abstracts of the 2012 International Conference on Solid State Devices and Materials (SSDM), p. 717-718 (2012).

M.M. Frank, High-k/metal gate innovations enabling continued CMOS scaling, Proceedings of the 41st European Solid-State Device Research Conference (ESSDERC), ISBN 978-1-4577-0705-6, ISSN 1930-8876, p. 25-33 (2011).

S. Sioncke, Y.J. Chabal, M.M. Frank, Germanium surface conditioning and passivation, in: K.A. Reinhardt, R.F. Reidy (eds.), Handbook of Cleaning for Semiconductor Manufacturing: Fundamentals and Applications, ISBN 978-0-470-62595-8 (Wiley-Scrivener, 2011), p. 429-472. E-book chapter doi: 10.1002/9781118071748.ch12 (John Wiley & Sons, Inc., Hoboken, NJ, USA)

M.M. Frank, Y.J. Chabal, Surface and interface chemistry for gate stacks on silicon, in: H. Huff (ed.), Into the Nano Era: Moore’s Law Beyond Planar Silicon CMOS, Springer Series in Materials Science, Vol. 106, ISBN: 978-3-540-74558-7 (Print), 978-3-540-74559-4 (Online) (Springer, 2009), p. 113-168.

H. Shang, E.P. Gusev, M.M. Frank, J.O. Chu, S. Bedell, M. Gribelyuk, J.A. Ott, X. Wang, K.W. Guarini, M. Ieong, Opportunities and challenges of germanium channel MOSFETs, in: A. Dimoulas, E. Gusev, P.C. McIntyre and M. Heyns (Eds.), Advanced Gate Stacks for High-Mobility Semiconductors, Springer Series in Advanced Microelectronics, Vol. 27, ISBN 978-3-540-71490-3 (Springer, 2007), p. 315-332.

P.D. Ye, G.D. Wilk, M.M. Frank, Processing and characterization of III-V compound semiconductor MOSFETs using atomic layer deposited gate dielectrics, in: A. Dimoulas, E. Gusev, P.C. McIntyre and M. Heyns (Eds.), Advanced Gate Stacks for High-Mobility Semiconductors, Springer Series in Advanced Microelectronics, Vol. 27, ISBN 978-3-540-71490-3 (Springer, 2007), p. 341-361.

M.M. Frank, Atomic layer deposition for CMOS scaling: High-k gate dielectrics on Si, Ge, and III-V semiconductors, ECS Trans. 11 (7), 187-200 (2007).

H. Shang, M.M. Frank, E.P. Gusev, J.O. Chu, S.W. Bedell, K.W. Guarini, M. Ieong, Germanium channel MOSFETs: Opportunities and challenges, IBM Journal of Research and Development 50, 377-386 (2006).

E.P. Gusev, V. Narayanan, M.M. Frank, Advanced high-k dielectric stacks with poly-Si and metal gates: Recent progress and current challenges, IBM Journal of Research and Development 50, 387-410 (2006).

P.W. Mertens, G. Vereecke, R. Vos, S. Arnauts, F. Barbagini, T. Bearda, S. Degendt, C. Demaco, A. Eitoku, M. Frank, W. Fyen, L. Hall, D. Hellin, F. Holsteyns, E. Kesters, M. Claes, K. Kim, K. Kenis, H. Kraus, R. Hoyer, T.Q. Le, M. Lux, K-T. Lee, M. Kocsis, T. Kotani, S. Malhouitre, A. Muscat, B. Onsia, S. Garaud, J. Rip, K. Sano, S. Sioncke, J. Snow, J. Van Hoeymissen, K. Wostyn, K. Xu, V. Parachiev, M. Heyns, Roadblocks and critical aspects of cleaning for sub-65nm technologies, 2006 International Symposium on VLSI Technology, Systems, and Applications (VLSI-TSA), Proceedings of Technical Papers, ISBN 1-4244-0181-X, p. 123-126 (2006).

M.M. Frank, Y.J. Chabal, Mechanistic studies of dielectric growth on silicon, in: A.A. Demkov, A. Navrotsky (Eds.), Materials Fundamentals of Gate Dielectrics, ISBN-13: 978-1-4020-3077-2 (HB), 978-1-4020-3078-9 (ebook), (Springer, Dordrecht, 2005), p. 367-401.

M. Frank, M. Bäumer, From atoms to crystallites: adsorption on oxide-supported metal particles, Phys. Chem. Chem. Phys. 2, 3723-3737 (2000). Amendment: Phys. Chem. Chem. Phys. 2, 4265 (2000).

 

Original research reports: Journal papers

M. M. Frank, C. Cabral, Jr., J. M. Dechene, C. Ortolland, Y. Zhu, E. D. Marshall, C. E. Murray, M. P. Chudzik, Titanium silicide/titanium nitride full metal gates for dual-channel gate-first CMOS, IEEE Electron Device Lett. 37 (2), 150-153 (2016).

A. Carr, J. Rozen, M. M. Frank, T. Ando, E. A. Cartier, P. Kerber, V. Narayanan, R. Haight, Evolution of interfacial Fermi level in In0.53Ga0.47As/high-κ/TiN gate stacks, Appl. Phys. Lett. 107, 012103 (2015).

Q. Cao, S.-j. Han, A. V. Penumatcha, M. M. Frank, G. S. Tulevski, J. Tersoff, W. E. Haensch, Origins and characteristics of the threshold voltage variability of quasiballistic single-walled carbon nanotube field-effect transistors, ACS Nano 9 (2), 1936-1944 (2015).

A. Majumdar, Y. Sun, C.-W. Cheng, Y.-H. Kim, U. Rana, R. M. Martin, R. L. Bruce, K.-T. Shiu, Y. Zhu, D. B. Farmer, M. Hopstaken, E. A. Joseph, J. P. de Souza, M. M. Frank, S.-L. Cheng, M. Kobayashi, E. A. Duch, D. K. Sadana, D.-G. Park, E. Leobandung, CMOS-compatible self-aligned In0.53Ga0.47As MOSFETs with gate lengths down to 30 nm, IEEE Trans. Electron Devices 61 (10), 3399-3404 (2014).

M. Choi, A. B. Posadas, C. A. Rodriguez, A. O’Hara, H. Seinige, A.J. Kellock, M.M. Frank, M. Tsoi, S. Zollner, V. Narayanan, A. A. Demkov, Structural, optical, and electrical properties of strained La-doped SrTiO3 films, J. Appl. Phys. 116, 043705 (2014).

M. Choi, C. Dubourdieu, A.J. Kellock, K. L. Lee, R.A. Haight, A. Pyzyna, M.M. Frank, A.A. Demkov, V. Narayanan, Tunable electrical properties of TaNx thin films grown by ionized physical vapor deposition, J. Vac. Sci. Technol. B 32, 051202 (2014).

M.D. McDaniel, A. Posadas, T.Q. Ngo, C.M. Karako, J. Bruley, M.M. Frank, V. Narayanan, A.A. Demkov, J.G. Ekerdt, Incorporation of La in epitaxial SrTiO3 thin films grown by atomic layer deposition on SrTiO3-buffered Si(001) substrates, J. Appl. Phys. 115, 224108 (2014).

D. J. Frank, P. M. Solomon, C. Dubourdieu, M. M. Frank, V. Narayanan, T. N. Theis, The quantum metal ferroelectric field-effect transistor, IEEE Trans. Electron Devices 61 (6), 2145-2153 (2014).

C. Dubourdieu, J. Bruley, T.M. Arruda, A. Posadas, J. Jordan-Sweet, M.M. Frank, E. Cartier, D.J. Frank, S.V. Kalinin, A.A. Demkov, V. Narayanan, Switching of ferroelectric polarization in epitaxial BaTiO3 films on silicon without a conducting bottom electrode, Nature Nanotech. 8, 748-754 (2013).

M.M. Frank, E.A. Cartier, T. Ando, S.W. Bedell, J. Bruley, Y. Zhu, V. Narayanan, Aggressive SiGe channel gate stack scaling by remote oxygen scavenging: Gate-first pFET performance and reliability, ECS Solid State Lett. 2 (2) N8-N10 (2013).

C. Dubourdieu, E. Cartier, J. Bruley, M. Hopstaken, M.M. Frank, V. Narayanan, High temperature (1000°C) compatible Y-La-Si-O silicate gate dielectric in direct contact with Si with 7.7 Å equivalent oxide thickness, Appl. Phys. Lett. 98, 252901 (2011).

M.M. Frank, C. Marchiori, J. Bruley, J. Fompeyrine, V. Narayanan, Epitaxial strontium oxide layers on silicon for gate-first and gate-last TiN/HfO2 gate stack scaling, Microelectron. Eng. 88, 1312-1316 (2011).

C. Marchiori, M.M. Frank, J. Bruley, V. Narayanan, J. Fompeyrine, Epitaxial SrO interfacial layers for HfO2-Si gate stack scaling, Appl. Phys. Lett. 98, 052908 (2011).

L.J. Klein, C. Dubourdieu, M.M. Frank, J. Hoffman, J.W. Reiner, C.H. Ahn, Domain dynamics in epitaxial Pb(Zr0.2Ti0.8)O3 films studied by piezoelectric force microscopy, J. Vac. Sci. Technol. B 28, C5A20-C5A23 (2010).

T. Ando, M. Copel, J. Bruley, M.M. Frank, H. Watanabe, V. Narayanan,Physical origins of mobility degradation in extremely scaled SiO2/HfO2 gate stacks with La and Al induced dipoles, Appl. Phys. Lett. 96, 132904 (2010).

M. Khater, Z. Zhang, J. Cai, C. Lavoie, C. D‘Emic, Q. Yang, B. Yang, M. Guillorn, D. Klaus, J. Ott, Y. Zhu, Y. Zhang, C. Choi, M.M. Frank, K.-L. Lee, V. Narayanan, D.-G. Park, Q. Ouyang, W. Haensch, High-k/metal gate fully depleted SOI CMOS with single-silicide Schottky source/drain with sub-30-nm gate length, IEEE Electron Device Lett. 31, 275-277 (2010).

S. Kim, S.L. Brown, S.M. Rossnagel, J. Bruley, M. Copel, M.J.P. Hopstaken, V. Narayanan, M.M. Frank, Oxygen migration in TiO2-based higher-k gate stacks, J. Appl. Phys. 107, 054102-1 – 054102-7 (2010).

M.M. Frank, S. Kim, S.L. Brown, J. Bruley, M. Copel, M. Hopstaken, M. Chudzik, V. Narayanan, Scaling the MOSFET gate dielectric: From high-k to higher-k? (Invited Paper), Microelectron. Eng. 86, 1603-1608 (2009).

C. Choi, T. Ando, E. Cartier, M.M Frank, R. Iijima, V. Narayanan, Quasi-damascene metal gate/high-k CMOS using oxygenation through gate electrodes, Microelectron. Eng., 86, 1737-1739 (2009).

D.H. Hill, R.A. Bartynski, N.V. Nguyen, A.C. Davydov, D. Chandler-Horowitz, M.M. Frank, The relationship between local order, long range order, and sub-band-gap defects in hafnium oxide and hafnium silicate films, J. Appl. Phys. 103, 093712-1 – 093712-5 (2008).

E. Kesters, M. Claes, Q.T. Le, M. Lux, A. Franquet, G. Vereecke, P.W. Mertens, M.M. Frank, R. Carleer, P. Adriaensens, J.J. Biebuyk, S. Bebelman, Chemical and structural modifications in a 193-nm photoresist after low-k dry etch, Thin Solid Films 516, 3454-3459 (2008).

M. Claes, Q.T. Le, J. Keldermans, E. Kesters, M. Lux, A. Franquet, G. Vereecke, P.W. Mertens, M.M. Frank, R. Carleer, P. Adriaensens, D. Vanderzande, Photoresist characterization and wet strip after low-k dry etch, Solid State Phenom. 134, 325-328 (2008).

K. Maitra, M.M. Frank, V. Narayanan, V. Misra, E.A. Cartier, Impact of metal gates on remote phonon scattering in titanium nitride/hafnium dioxide n-channel metal-oxide-semiconductor field effect transistors – low temperature electron mobility study, J. Appl. Phys. 102, 114507-1 – 114507-5 (2007).

M.M. Frank, Y. Wang, M.-T. Ho, R.T. Brewer, N. Moumen, Y.J. Chabal, Hydrogen barrier layer against silicon oxidation during atomic layer deposition of Al2O3 and HfO2, J. Electrochem. Soc. 154, G44-G48 (2007).

M.M. Frank, S.J. Koester, M. Copel, J.A. Ott, V.K. Paruchuri, H. Shang, R. Loesing, Hafnium oxide gate dielectrics on sulfur-passivated germanium, Appl. Phys. Lett. 89, 112905-1 - 112905-3 (2006).

V. Narayanan, K. Maitra, B.P. Linder, V.K. Paruchuri, E.P. Gusev, P. Jamison, M.M. Frank, M.L. Steen, D. La Tulipe, J. Arnold, R. Carruthers, D. L. Lacey, E. Cartier, Process optimization for high electron mobility in nMOSFETs with aggressively scaled HfO2/metal stacks, IEEE Electron Device Lett. 27, 591-594 (2006).

D.W. Abraham, M.M. Frank, S. Guha, Absence of magnetism in hafnium oxide films, Appl. Phys. Lett. 87, 252502-1 - 252502-3 (2005).

N.V. Nguyen, A.V. Davydov, D. Chandler-Horowitz, M.M. Frank, Sub-bandgap defect states in polycrystalline hafnium oxide and their suppression by admixture of silicon, Appl. Phys. Lett. 87, 192903-1 - 192903-3 (2005).

M.M. Frank, G.D. Wilk, D. Starodub, T. Gustafsson, E. Garfunkel, Y.J. Chabal, J. Grazul, D.A. Muller, HfO2 and Al2O3 gate dielectrics on GaAs grown by atomic layer deposition, Appl. Phys. Lett. 86, 152904-1 - 152904-3 (2005).

S. Rivillon, F. Amy, Y.J. Chabal, M.M. Frank, Gas phase chlorination of hydrogen-passivated silicon surfaces, Appl. Phys. Lett. 85, 2583-2585 (2004).

N. Magg, J.B. Giorgi, M.M. Frank, B. Immaraporn, T. Schroeder, M. Bäumer, H.-J. Freund, Alumina-supported vanadium nanoparticles: structural characterization and CO adsorption properties, J. Am. Chem. Soc. 126, 3616-3626 (2004).

S. Bertarione, D. Scarano, A. Zecchina, V. Johánek, J. Hoffmann, S. Schauermann, M.M. Frank, J. Libuda, G. Rupprechter, H.-J. Freund, Surface reactivity of Pd nanoparticles supported on polycrystalline substrates as compared to thin film model catalysts: infrared study of CO adsorption, J. Phys. Chem. B 108, 3603-3613 (2004).

B. de Boer, M.M. Frank, Y.J. Chabal, W. Jiang, E. Garfunkel, Z. Bao, Metallic contact formation for molecular electronics: interactions between vapor-deposited metals and self-assembled monolayers of conjugated mono- and dithiols, Langmuir 20, 1539-1542 (2004).

M.M. Frank, S. Sayan, S. Dörmann, T.J. Emge, L.S. Wielunski, E. Garfunkel, Y.J. Chabal, Hafnium oxide gate dielectrics grown from an alkoxide precursor: structure and defects, Mater. Sci. Eng.: B 109, 6-10 (2004).

M.D. Halls, K. Raghavachari, M.M. Frank, Y.J. Chabal, Atomic layer deposition of Al2O3 on H-passivated Si: Al(CH3)2OH surface reactions with H/Si(100)-2x1, Phys. Rev. B 68, 161302-1(R)-161302-3(R) (2003).

M.M. Frank, Y.J. Chabal, M.L. Green, A. Delabie, B. Brijs, G.D. Wilk, M.-Y. Ho, E.B.O. da Rosa, I.J.R. Baumvol, F.C. Stedile, Enhanced initial growth of atomic-layer-deposited metal oxides on hydrogen-terminated silicon, Appl. Phys. Lett. 83, 740-742 (2003).

M.M. Frank, Y.J. Chabal and G.D. Wilk, Nucleation and interface formation mechanisms in atomic layer deposition of gate oxides, Appl. Phys. Lett. 82, 4758-4760 (2003).

B. de Boer, H. Meng,D.F. Perepichka, J. Zheng, M.M. Frank, Y.J. Chabal, Z. Bao, Synthesis and characterization of conjugated mono- and dithiol oligomers and characterization of their self-assembled monolayers, Langmuir 19, 4272-4284 (2003).

Sh. Shaikhutdinov, M. Frank, M. Bäumer, S.D. Jackson, R.J. Oldman, J.C. Hemminger, H.-J. Freund, Effect of carbon deposits on reactivity of supported Pd model catalysts, Catal. Lett. 80, 115-122 (2002).

M. Frank, K. Wolter, N. Magg, M. Heemeier, R. Kühnemuth, M. Bäumer, H.-J. Freund, Phonons of clean and metal-modified oxide films: an infrared and HREELS study, Surf. Sci. 492, 270-284 (2001).

M. Frank, M. Bäumer, R. Kühnemuth, H.-J. Freund, Metal atoms and particles on oxide supports: probing structure and charge by infrared spectroscopy, J. Phys. Chem. B 105, 8569-8576 (2001).

M. Frank, M. Bäumer, R. Kühnemuth, H.-J. Freund, Adsorption and reaction of ethene on oxide-supported Pd, Rh and Ir particles, J. Vac. Sci. Technol. A 19, 1497-1501 (2001).

M. Heemeier, M. Frank, J. Libuda, K. Wolter, H. Kuhlenbeck, M. Bäumer, H.-J. Freund, The influence of OH groups on the growth of rhodium on alumina: a model study, Catal. Lett. 68, 19-24 (2000).

M. Bäumer, M. Frank, M. Heemeier, R. Kühnemuth, S. Stempel, H.-J. Freund, Nucleation and growth of transition metals on a thin alumina film, Surf. Sci. 454-456, 957-962 (2000).

M. Frank, R. Kühnemuth, M. Bäumer, H.-J. Freund, Vibrational spectroscopy of CO adsorbed on supported ultra-small transition metal particles and single metal atoms, Surf. Sci. 454-456, 968-973 (2000).

S. Andersson, P.A. Brühwiler, A. Sandell, M. Frank, J. Libuda, A. Giertz, B. Brena, A.J. Maxwell, M. Bäumer, H.-J. Freund, N. Mårtensson, Metal-oxide interaction for metal clusters on a metal-supported thin alumina film, Surf. Sci. 442, L964-L970 (1999).

M. Frank, R. Kühnemuth, M. Bäumer, H.-J. Freund, Oxide-supported Rh particle structure probed with carbon monoxide, Surf. Sci. 427-428, 288-294 (1999).

S. Andersson, M. Frank, A. Sandell, J. Libuda, B. Brena, A. Giertz, P.A. Brühwiler, M. Bäumer, N. Mårtensson, H.-J. Freund, Temperature dependent XPS study of CO dissociation on small Rh particles, Vacuum 49, 167-170 (1998).

S. Andersson, M. Frank, A. Sandell, A. Giertz, B. Brena, P.A. Brühwiler, N. Mårtensson, J. Libuda, M. Bäumer, H.-J. Freund, CO dissociation characteristics on size-distributed rhodium islands on alumina substrates, J. Chem. Phys. 108, 2967-2974 (1998).

M. Frank, S. Andersson, J. Libuda, S. Stempel, A. Sandell, B. Brena, A. Giertz, P.A. Brühwiler, M. Bäumer, N. Mårtensson, H.-J. Freund, Particle size dependent CO dissociation on alumina-supported Rh: a model study, Chem. Phys. Lett. 279, 92-99 (1997). Erratum: Chem. Phys. Lett. 310, 229-230 (1999).

M. Bäumer, M. Frank, J. Libuda, S. Stempel, H.-J. Freund, Growth and morphology of Rh deposits on an alumina film under UHV conditions and under the influence of CO, Surf. Sci. 391, 204-215 (1997).

J. Libuda, M. Frank, A. Sandell, S. Andersson, P.A. Brühwiler, M. Bäumer, N. Mårtensson, H.-J. Freund, Interaction of rhodium with hydroxylated alumina model substrates, Surf. Sci. 384, 106-119 (1997).

 

Original research reports: Refereed conference proceedings volumes

E. Cartier, A. Majumdar, K.-T. Lee, T. Ando, M. M. Frank, J. Rozen, K. Jenkins, C. Liang, C.-W. Cheng, J. Bruley, M. Hopstaken, P. Kerber, J.-B. Yau, X. Sun, R. T. Mo, C.-C. Yeh, E. Leobandung, V. Narayanan, Electron mobility in thin In0.53Ga0.47As channel, Proceedings of the 47th European Solid-State Device Research Conference (ESSDERC), ISBN 978-1-5090-5978-2, p. 292-295 (2017).

X. Sun, C. D’Emic, C.-W. Cheng, A. Majumdar, Y. Sun, E. Cartier, R. L. Bruce, M. Frank, H. Miyazoe, K.-T. Shiu, S. Lee, J. Rozen, J. Patel, T. Ando, W.-B. Song, M. Lofaro, M. Krishnan, B. Obrodovic, K.-T. Lee, H. Tsai, W.-E. Wang, W. Spratt, K. Chan, S. Lee, J.-B. Yau, P. Hashemi, M. Khojasteh, M. Cantoro, J. Ott, T. Rakshit, Y. Zhu, D. Sadana, C.-C. Yeh, V. Narayanan, R. T. Mo, Y.-C. Heo, D.-W. Kim, M.S. Rodder, E. Leobandung, High performance and low leakage current InGaAs-on-silicon FinFETs with 20 nm gate length, 2017 Symposium on VLSI Technology, Digest of Technical Papers, ISBN: 978-4-86348-605-8, p. T40-T41 (2017).

Y. Sun, K.-T. Shiu, C.-W. Cheng, A. Majumdar, R. Bruce, J.-B. Yau, D. Farmer, Y. Zhu, M. Hopstaken, M. M. Frank, T. Ando, K. T. Lee, J. Rozen, D. K. Sadana, V. Narayanan, R. T. Mo, E. Leobandung, CMOS compatible high performance IIIV devices: Opportunities and challenges, ECS Trans. 72 (4) 313-319 (2016).

S. Schamm-Chardon, C. Magen, L. Mazet, R. Cours, M. Frank, V. Narayanan, C. Dubourdieu, Epitaxial BaTiO3 on Si and SiGe for low power devices: nanoscale characterization of the film and its interface with the semiconductor by HAADF and EELS in STEM, Proceedings of the 16th European Microscopy Congress (EMC), Lyon, DOI: 10.1002/9783527808465.EMC2016.6870, p. 1112-1113 (2016).

Y. Sun, A. Majumdar, C.-W. Cheng, R. M. Martin, R. L. Bruce, J.-B. Yau, D. B. Farmer, Y. Zhu, M. Hopstaken, M. M. Frank, T. Ando, K.-T. Lee, J. Rozen, A. Basu, K.-T. Shiu, P. Kerber, D.-G. Park, V. Narayanan, R. T. Mo, D. K. Sadana, and E. Leobandung, CMOS compatible self-aligned In0.53Ga0.47As MOSFETs with GMSAT over 2200 mS/mm at VDD = 0.5 V, 2014 International Electron Devices Meeting (IEDM) Technical Digest, p. 582-585 (2014).

Y. Sun, A. Majumdar, C.-W. Cheng, Y.-H. Kim, U. Rana, R.M. Martin, R.L. Bruce, K.-T. Shiu, Y. Zhu, D. Farmer, M. Hopstaken, E.A. Joseph, J.P. de Souza, M.M. Frank, S.-L. Cheng, M. Kobayashi, E.A. Duch, D.K. Sadana, D.-G. Park, E. Leobandung, Self-aligned III-V MOSFETs: Towards a CMOS compatible and manufacturable technology solution, 2013 International Electron Devices Meeting (IEDM) Technical Digest, ISBN 978-1-4799-2306-9, p. 48-51 (2013).

A. Majumdar, S. Bangsaruntip, G.M. Cohen, L.M. Gignac, M. Guillorn, M.M. Frank, J.W. Sleight, D.A. Antoniadis, Room-temperature carrier transport in high-performance short-channel silicon nanowire MOSFETs, 2012 International Electron Devices Meeting (IEDM) Technical Digest, ISBN 978-1-4673-4871-3, p. 179-182 (2012).

M.M. Frank, E.A. Cartier, T. Ando, S.W. Bedell, J. Bruley, Y. Zhu, V. Narayanan, Aggressive SiGe channel gate stack scaling by remote oxygen scavenging: Gate-first pFET performance and reliability, ECS Trans. 50 (4) 275-280 (2012).

E. Cartier, A. Kerber, S. Krishnan, B. Linder, T. Ando, M.M. Frank, K. Choi, V. Narayanan, Voltage ramp stress (VRS) based sense-and-stress test method for reliability characterization of Hf-base high-k/metal gate stacks for CMOS technologies, ECS Trans. 41 (3) 337-348 (2011).

S. Krishnan, U. Kwon, N. Moumen, M. Stoker, E.C.T. Harley, S. Bedell, D. Nair, B. Greene, W. Henson, M. Chowdhury, D.P. Prakash, E. Wu, D. Ioannou, E. Cartier, M.-H. Na, S. Inumiya, K. Mcstay, L. Edge, R. Iijima, J. Cai, M. Frank, M. Hargrove, A. Kerber, H. Jagannathan, T. Ando, J. Shepard, S. Siddiqui, M. Dai, H. Bu, J. Schaeffer, D. Jaeger, K. Barla, T. Wallner, S. Uchimura, Y. Lee, G. Karve, S. Zafar, D. Schepis, Y. Wang, R. Donaton, S. Saroop, P. Montanini, Y. Liang, J. Stathis, R. Carter, R. Pal, V. Paruchuri, H. Yamasaki, J.-H. Lee, M. Ostermayr, J-P. Han, Y. Hu, M. Gribelyuk, D.-G. Park, X. Chen, S. Samavedam, S. Narasimha, P. Agnello, M. Khare, R. Divakaruni, V. Narayanan, M. Chudzik, A manufacturable dual channel (Si and SiGe), high-K metal gate CMOS technology with multiple oxides for high performance and low power applications, 2011 International Electron Devices Meeting (IEDM) Technical Digest, ISBN 978-1-4577-0505-2, p. 634-637 (2011).

E. Cartier, A. Kerber, T. Ando, M.M. Frank, K. Choi, S. Krishnan, B. Linder, K. Zhao, F. Monsieur, J. Stathis and V. Narayanan, Fundamental aspects of HfO2-based high-k metal gate stack reliability and implications on tinv-scaling, 2011 International Electron Devices Meeting (IEDM) Technical Digest, ISBN 978-1-4577-0505-2, p. 441-444 (2011).

E. Cartier, A. Kerber, S. Krishnan, B. Linder, T. Ando, M.M. Frank, K. Choi, V. Narayanan, Voltage ramp stress based stress-and-sense test method for reliability characterization of Hf-base high-k/metal gate stacks for CMOS technologies, ECS Trans. 41 (3) 337-348 (2011).

S.-C. Seo, L.F. Edge, S. Kanakasabapathy, M. Frank, A. Inada, L. Adam, M.M. Wang, K. Watanabe, P. Jamison, K. Ariyoshi, M. Sankarapandian, S. Fan, D. Horak, J.T. Li, T. Vo, B. Haran, J. Bruley, M. Hopstaken, S.L. Brown, J. Chang, E.A. Cartier, D.-G. Park, J.H. Stathis, B. Doris, R. Divakaruni, M. Khare, V. Narayanan, V.K. Paruchuri, Full metal gate with borderless contact for 14 nm and beyond, 2011 Symposium on VLSI Technology, Digest of Technical Papers, p. 36-37 (2011).

J. Bruley, M. Frank, C. Marchiori, J. Fompeyrine, V. Narayanan, Characterization of strontium oxide layers on silicon for CMOS high-k gate stack scaling, Microsc. Microanal. 17 (Suppl. 2), 1350-1351 (2011).

J. Sleight, S. Bangsaruntip, G. Cohen, A. Majumdar, Y. Zhang, S. Engelmann, N. Fuller, L. Gignac, S. Mittal, J. Newbury, T. Barwicz, M. Frank, M. Guillorn, High performance and highly uniform metal hi-k gate-all-around silicon nanowire MOSFETs, ECS Trans. 28 (1) 179-189 (2010).

T. Ando, M.M. Frank, K. Choi, C. Choi, J. Bruley, M. Hopstaken, R. Haight, M. Copel, H. Arimura, H. Watanabe, V. Narayanan, Ultimate EOT scaling (< 5Å) using Hf-based high-k gate dielectrics and impact on carrier mobility, ECS Trans. 28, 115-123 (2010).

M.J.P. Hopstaken, J. Bruley, D. Pfeiffer, M. Copel, M.M. Frank, E. Cartier, T. Ando, V. Narayanan, Oxygen transport in high-κ metal gate stacks and physical characterization by SIMS using isotopic labeled oxygen, ECS Trans. 28, 105-113 (2010).

J. Bruley, M.M. Frank, V. Narayanan, B. Mendis, M. Gass, Structure and composition of metal-doped HfO2 gate oxides in CMOS devices studied by high resolution STEM and EELS, Microsc. Microanal. 16 (Suppl. 2), 1892-1893 (2010).

J.W. Sleight, S. Bangsaruntip, A. Majumdar, G.M. Cohen, Y. Zhang, S.U. Engelmann, N.C.M. Fuller, L.M. Gignac, S. Mittal, J.S. Newbury, M.M. Frank, M. Guillorn, Gate-all-around silicon nanowire MOSFETs and circuits, 68th Device Research Conference Digest; ISBN 978-1-4244-7870-5, p. 269-272 (2010)

M. Guillorn, J. Chang, A. Pyzyna, S. Engelmann, E. Joseph, B. Fletcher, C. Cabral, Jr., C.-H. Lin, A. Bryant, M. Darnon, J. Ott, C. Lavoie, M. Frank, L. Gignac, J. Newbury, C. Wang, D. Klaus, E. Kratschmer, J. Bucchignano, B. To, W. Graham, I. Lauer, E. Sikorski, S. Carter, V. Narayanan, N. Fuller, Y. Zhang, W. Haensch, Trigate 6T SRAM scaling to 0.06 μm2, 2009 International Electron Devices Meeting (IEDM) Technical Digest, ISBN 97-4244-5640-6, p. 691-693 (2009).

S. Bangsaruntip, G.M. Cohen, A. Majumdar, Y. Zhang, S.U. Engelmann, N.C.M. Fuller, L.M. Gignac, S. Mittal, J.S. Newbury, M. Guillorn, T. Barwicz, L. Sekaric, M.M. Frank, and J.W. Sleight, High performance and highly uniform gate-all-around silicon nanowire MOSFETs with wire size dependent scaling, 2009 International Electron Devices Meeting (IEDM) Technical Digest, ISBN 97-4244-5640-6, p. 297-300 (2009).

T. Ando, M.M. Frank, K. Choi, C. Choi, J. Bruley, M. Hopstaken, M. Copel, E. Cartier, A. Kerber, A. Callegari, D. Lacey, S. Brown, Q. Yang, V. Narayanan, Understanding mobility mechanisms in extremely scaled HfO2 (EOT 0.42 nm) using remote interfacial layer scavenging technique and Vt-tuning dipoles with gate-first process, 2009 International Electron Devices Meeting (IEDM) Technical Digest, ISBN 97-4244-5640-6, p. 423-426 (2009).

E. Cartier, M. Steen, B. P. Linder, T. Ando, R. Iijima, M. Frank, J.S. Newbury, Y.H. Kim, F.R. McFeely, M. Copel, R. Haight, C. Choi, C. Choi, A. Callegari, V.K. Paruchuri, V. Narayanan, pFET Vt control with HfO2/TiN/poly-Si gate stack using a lateral oxygenation process, 2009 Symposium on VLSI Technology, Digest of Technical Papers, p. 42-43 (2009).

K. Choi, H. Jagannathan, C. Choi, L. Edge, T. Ando, M. Frank, P. Jamison, M. Wang, E. Cartier, S. Zafar, J. Bruley, A. Kerber, B. Linder, A. Callegari, Q. Yang, S. Brown, J. Stathis, J. Iacoponi, V. Paruchuri, V. Narayanan, Extremely scaled gate-first high-k/metal gate stack with EOT of 0.55 nm using novel interfacial layer scavenging techniques for 22nm technology node and beyond, 2009 Symposium on VLSI Technology, Digest of Technical Papers, p. 138-139 (2009).

K. Henson, H. Bu, M.H. Na, Y. Liang, U. Kwon, S. Krishnan, J. Schaeffer, R. Jha, N. Moumen, R. Carter, C. DeWan, R. Donaton, D. Guo, M. Hargrove, W. He, R. Mo, R. Ramachandran, K. Ramani, K. Schonenberg, Y. Tsang, X. Wang, M. Gribelyuk, W. Yan, J. Shepard, E. Cartier, M. Frank, E. Harley, R. Arndt, R. Knarr, T. Bailey, B. Zhang, K. Wong, T. Graves-Abe, E. Luckowski, D.-G. Park, V. Narayanan, M. Chudzik, M. Khare, Gate length scaling and high drive currents enabled for high performance SOI technology using high-κ/metal gate, 2008 International Electron Devices Meeting (IEDM) Technical Digest; ISBN 1-4244-2377-4, p. 645-648 (2008).

G.G. Totir, M.M. Frank, R. Vos, S. Arnauts, T. Bearda, K. Kenis, M. Delande, Q.T. Le, E. Kesters, G. Vereecke, G. Mannaert, M. Lux, I. Hoflijk, T. Conard, S. Banerjee, S. Malhouitre, P. Leunissen and P.W. Mertens, Post ion-implant photoresist removal via wet chemical cleans combined with physical force pretreatments, ECS Trans. 11 (2), 219-226 (2007).

P. Jamison, M. Copel, M. Chudzik, M.M. Frank, B.P. Linder, R. Jammy, W. Zhu, A comparison of electrical and physical properties of MOCVD hafnium silicate thin films deposited using various silicon precursors, in: R. Jammy, A. Shanware, V. Misra, Y. Tsunashima, S. De Gendt (eds.), Gate Stack Scaling - Materials Selection, Role of Interfaces, and Reliability Implications, Mater. Res. Soc. Symp. Proc. 917E, paper 0917-E07-03 (5 pages), (Materials Research Society, Warrendale, PA,2006).

K.L. Lee, M.M. Frank, V. Paruchuri, E. Cartier, B. Linder, N. Bojarczuk, X. Wang, J. Rubino, M. Steen, P. Kozlowski, J. Newbury, E. Sikorski, P. Flaitz, M. Gribelyuk, P. Jamison, G. Singco, V. Narayanan, S. Zafar, S. Guha, P. Oldiges, R. Jammy, M. Ieong, Poly-Si/AlN/HfSiO stack for ideal ideal threshold voltage and mobility in sub-100 nm MOSFETs, 2006 Symposium on VLSI Technology, Digest of Technical Papers; print edition: ISBN 1-4244-0004-X, p. 202-203; online edition: ISBN 1-4244-0005-8, p. 160-161 (2006).

S. J. Koester, M.M. Frank, D.M. Isaacson, H. Shang, Temperature-dependent admittance analysis of HfO2 gate dielectrics on nitrogen- and sulfur-passivated Ge, Conference Digest of the Third International Silicon Germanium Technology and Device Meeting (ISTDM 2006), ISBN 1-4244-0461-4, 4B.1, (2006).

M.M. Frank, H. Shang, S. Rivillon, F. Amy, C.-L. Hsueh, V.K. Paruchuri, R.T. Mo, M. Copel, E.P. Gusev, M.A. Gribelyuk, Y.J. Chabal, High-k gate dielectrics on silicon and germanium: impact of surface preparation, Solid State Phenom. 103-104, 3-6 (2005).

R. Jammy, V. Narayanan, M.M. Frank, V.K. Paruchuri, A. Callegari, E.P. Gusev, C. Cabral, B. Linder, S. Zafar, E.A. Cartier, K.-L. Lee, P.C. Jamison, M.L. Steen, M. Copel, M. Gribelyuk, S.A. Cohen, N. Bojarczuk, D. Lacey, G. Singco, K. Maitra, X. Wang, P.M. Kozlowski, J.S. Newbury, D.R. Medeiros, P. Oldiges, S. Guha, M. Ieong, G. Shahidi, Optimization of high k gate stacks with poly-Si, FUSI, and metal electrodes, in: M. Yang (ed.), Semiconductor Technology (ISTC 2005): Proceedings of the 4th SEMI-ECS International Semiconductor Technology Conference (SEMI-ECS-ISTC2005), ISBN 1-56677-468-3, p. 8-14.

K. Maitra, B.P. Linder, E.P. Gusev, V. Narayanan, M.M. Frank, E.A. Cartier, On the location and magnitude of trapped charge in poly-Si ALD-Al2O3 capped Hf-silicate gate stacks, in: E. P. Gusev, L. J. Chen, D.-L. Kwong, P. J. Timans, F. Roozeboom, M. C. Öztürk, and H. Iwai, (eds.), Advanced Gate Stack, Source/Drain, and Channel Engineering for Si-Based CMOS: New Materials, Processes, and Equipment, Proceedings Volume 2005-05, ISBN 1-56677-463-2, p. 118-124 (Electrochemical Society, NJ, 2005).

M.M. Frank, V.K. Paruchuri, V. Narayanan, N. Bojarczuk, B. Linder, S. Zafar, E.A. Cartier, E.P. Gusev, P.C. Jamison, K.-L. Lee, M.L. Steen, M. Copel, S.A. Cohen, K. Maitra, X. Wang, P.M. Kozlowski, J.S. Newbury, D.R. Medeiros, P. Oldiges, S. Guha, R. Jammy, M. Ieong, G. Shahidi, Poly-Si/high-k gate stacks with near-ideal threshold voltage and mobility, 2005 IEEE VLSI-TSA, International Symposium on VLSI Technology (VLSI-TSA-Tech), Proceedings of Technical Papers, p. 97-98 (2005) (ISBN 0-7803-9058-X).

M.M. Frank, Novel gate dielectrics on silicon, germanium, and III-V semiconductors: interface chemistry, Sixth International Conference on Microelectronics and Interfaces (AVS-ICMI), Proceedings, p. 11-13 (American Vacuum Society, New York, 2005) (ISBN 0-9713614-3-6).

E.P. Gusev, C. Cabral, Jr., B.P. Linder, Y.H. Kim, K. Maitra, E. Cartier, H. Nayfeh, R. Amos, G. Biery, N. Bojarczuk, A. Callegari, R. Carruthers, S.A. Cohen, M. Copel, S. Fang, M. Frank, S. Guha, M. Gribelyuk, P. Jamison, R. Jammy, M. Ieong, J. Kedzierski, P. Kozlowski, V. Ku, D. Lacey, D. LaTulipe, V. Narayanan, H. Ng, P. Nguyen, J. Newbury, V. Paruchuri, R. Rengarajan, G. Shahidi, A. Steegen, M. Steen, S. Zafar, Y. Zhang, Advanced gate stacks with fully silicided (FUSI) gates and high-κ dielectrics: enhanced performance at reduced gate leakage, 2004 International Electron Devices Meeting (IEDM) Technical Digest, p. 79-82 (2004).

E. Cartier, V. Narayanan, E.P. Gusev, P. Jamison, B. Linder, M. Steen, K.K. Chan, M. Frank, N. Bojarczuk, M. Copel, S.A. Cohen, S. Zafar, A. Callegari, M. Gribelyuk, M.P. Chudzik, C. Cabral Jr., R. Carruthers, C. D’Emic, J. Newbury, D. Lacey, S. Guha, R. Jammy, Systematic study of pFET Vt with Hf-based gate stacks with poly-Si and FUSI gates, 2004 Symposium on VLSI Technology, Digest of Technical Papers, p. 44-45 (2004) (ISBN 0-7803-8288-9).

W. Jiang, O. Celik, N. Zhitenev, Z. Bao, B. de Boer, J. Zaumseil, Y.J. Chabal, M.M. Frank, E. Garfunkel, Structural and electrical characterization of organic monolayers on surfaces, Polymer Preprints 44, 372-372 (2003).

M.M. Frank, B. de Boer, Y.J. Chabal, Z. Bao, Self-assembled monolayers of conjugated thiols studied by infrared spectroscopy: structure and metal electrode deposition, Polymer Preprints 44, 383-384 (2003).

A. Fontcuberta i Morral, J.M. Zahler, H.A. Atwater, M.M. Frank, Y.J. Chabal, P. Ahrenkiel, M. Wanlass, Electrical and structural characterization of the interface of wafer bonded InP/Si, in: H.A. Atwater, M. Levy, M.I. Current, T. Sands (eds.), Integration of Heterogeneous Thin-Film Materials and Devices (Materials Research Society, Warrendale, PA), Mater. Res. Soc. Symp. Proc. 768, 27-32 (e-book: G2.4.1-G2.4.6) (2003).

M.M. Frank, Y.J. Chabal and G.D. Wilk, In situ spectroscopic approach to atomic layer deposition, in: M.I. Gardner, S. De Gendt, J.-P. Maria, S. Stemmer (eds.), Novel Materials and Processes for Advanced CMOS (Materials Research Society, Warrendale, PA), Mater. Res. Soc. Symp. Proc. 745, 41-46 (2003).

M. Bäumer, M. Frank, M. Heemeier, R. Kühnemuth, S. Stempel, H.-J. Freund, Metal particles on oxide surfaces: structure and adsorption behaviour, in: A. Corma, F.V. Melo, S. Mendioroz, J.L.G. Fierro (Eds.), 12th International Congress on Catalysis, Studies in surface science and catalysis, Vol. 130, Elsevier, Amsterdam, 2000, p. 311-316.

J. Libuda, M. Frank, A. Sandell, S. Andersson, P.A. Brühwiler, M. Bäumer, N. Mårtensson, H.-J. Freund, Size dependent CO dissociation on Rh particles supported on thin alumina films, in: A. Okiji, H. Kasai, K. Makoshi (Eds.), Elementary Processes in Excitations and Reactions on Solid Surfaces, Springer Series in Surface Sciences, vol. 121, Springer, Berlin, Heidelberg 1996, p. 210-216.

 

PRESENTATIONS

Invited Presentations

Epitaxial BaTiO3 on silicon and silicon germanium: Nanoscale characterization, ferroelectricity and integration into TiN-gated devices
2016 Materials Research Society (MRS) Spring Meeting, Phoenix, AZ, Mar 30, 2016

Metals, oxides, semiconductors: Gate stacks for Si, SiGe, and III-V transistors
Rutgers University, Laboratory for Surface Modification (LSM) Seminar, Nov 13, 2014.

Gate stacks for silicon, silicon germanium, and III-V channel MOSFETs
225th ECS Meeting, Orlando, FL, May 13, 2014.

New front-end materials for continued CMOS logic scaling
4th Fraunhofer IPMS-CNT Industry Partner Day, Dresden, Germany, Feb 6, 2014.

SiGe channel gate stack scaling: Oxygen scavenging and full metal gates
8th International Conference on Si Epitaxy and Heterostructures / 6th International Symposium on Control of Semiconductor Interfaces (ICSI-8/ISCSI-VI), Fukuoka, Japan, Jun 5, 2013

Plenary talk:Gate stack options for future CMOS logic
17th Workshop on Dielectrics in Microelectronics (WoDiM), Dresden, Germany, Jun 25, 2012

Lectures:1. The MOSFET gate stack: Five decades of materials science; 2. The MOSFET gate stack: Toward ultimate scaling
WE-Heraeus Physics School ‘Microelectronics for Society: More than Moore expands More Moore’, Bad Honnef, Germany, Jun 11 and 12, 2012

Full metal gates for CMOS logic scaling
IBM Materials Research Community (MRC) Seminar, IBM T.J. Watson Research Center, Yorktown Heights, NY, Nov 17, 2011

Plenary talk: High-k/metal gate innovations enabling continued CMOS scaling
41st European Solid-State Device Research Conference (ESSDERC), Helsinki, Finland, Sep 13, 2011

High-k/metal gate approaches for continued CMOS scaling
STMicroelectronics, Crolles, France, Jun 24, 2011

Plenty of room at the bottom: Scaling the high-k/silicon interfacial layer
16th Workshop on Dielectrics in Microelectronics (WoDiM), Bratislava, Slovakia, Jun 28, 2010

Interfacial layer scaling strategies for metal gate / high-k stacks on silicon
Materials Research Society (MRS) 2010 Spring Meeting, San Francisco, CA, USA, Apr 7, 2010

Scaling the high-k gate dielectric: Interfacial layer scaling or ‘higher-k’?
Forschungszentrum Jülich, Jülich, Germany, Aug 13, 2009

Lectures: 1. Gate dielectrics: At the heart of silicon microelectronics; 2. Gate dielectrics today and tomorrow: From high-k dielectrics to oxides on Ge and III-V semiconductors
WE-Heraeus Physics School ‘Nanoscaled Oxides – Big Opportunities in Small Structures’, Bad Honnef, Germany, Aug 6 and 7, 2009

Scaling the MOSFET gate dielectric: From high-k to higher-k?
16th Biannual Conference on Insulating Films on Semiconductors (INFOS 2009), Cambridge (UK), Jun 30, 2009

Scaling the metal gate / high-k stack – From high-k to higher-k?
Materials Research Society (MRS) 2009 Spring Meeting, San Francisco, CA, USA, Apr 14, 2009

Tutorial: High-mobility channels: Fundamentals of surface preparation
9th International Symposium on Ultra Clean Processing of Semiconductor Surfaces (UCPSS), Brugge, Belgium, Sep 21, 2008

Sulfur, an attractive passivant for germanium channel gate stacks?
10th Annual SEMATECH Surface Preparation and Cleaning Conference (SPCC), Austin, TX, Apr 1, 2008

‘Hauptvortrag’: High-k gate dielectrics on silicon and on high-mobility semiconductors: Atomic-scale phenomena underlying transistor performance
72nd Annual Meeting of the German Physical Society (Deutsche Physikalische Gesellschaft, DPG), Berlin, Germany, Feb 25, 2008

Atomic layer deposition for CMOS scaling: High-k gate dielectrics on Si, Ge, and III-V semiconductors
212th Electrochemical Society (ECS) Meeting, Washington, DC, USA, Oct 9, 2007

High-k gate dielectrics on silicon and on high-mobility semiconductors: Interface chemistry and threshold voltage control
IBM Materials Research Community Oxide Workshop, Zurich, Switzerland, Jun 25, 2007

Atomic layer deposition of high-k gate dielectrics onto Si, Ge, and III-V semiconductors: Interface chemistry
Materials Research Society (MRS) 2007 Spring Meeting, San Francisco, CA, USA, Apr 11, 2007

Ultrathin dielectric oxides for microelectronics: Electrical characteristics and defects
Workshop “Microelectronics meets Catalysis: Innovative Oxide Materials”, Hanse Wissenschaftskolleg (HWK), Delmenhorst, Germany, Jul 20, 2006

High-k gate dielectrics on Si, Ge, and GaAs
CAPE Advanced Technology Seminar, CAPE Centre for Advanced Photonics and Electronics, University of Cambridge, UK, Jul 14, 2006

High-k gate dielectrics on Si, Ge, and GaAs: Interface chemistry
European Materials Research Society (E-MRS) Spring Meeting, Nice, France, May 30, 2006

Oxide-semiconductor interfaces: High-k gate dielectrics on Si, Ge, and GaAs
IHP - Innovations for High Performance Microelectronics / Institut für innovative Mikroelektronik, Frankfurt (Oder), Germany, Mar 3, 2006

Novel gate dielectrics on silicon, germanium, and III-V semiconductors: interface chemistry
Sixth International Conference on Microelectronics and Interfaces (AVS-ICMI), Santa Clara, CA, Mar 21, 2005

Atomic layer deposition of high-k gate dielectrics onto Ge and III-V semiconductors
35th IEEE Semiconductor Interface Specialists Conference (SISC), San Diego, CA, Dec 9, 2004

High-k dielectrics on Si and on high-mobility substrates: Impact of surface preparation
7th International Symposium on Ultra Clean Processing of Silicon Surfaces (UCPSS), Bruxelles, Belgium, Sep 20, 2004

Gate oxides on Si and on high-mobility substrates: substrate, growth, and interface chemistry
IBM Zürich Research Laboratory, Rüschlikon, Switzerland, Jan 5, 2004

Atomic-scale mechanisms of high-k atomic layer deposition
IBM T. J. Watson Research Center, Yorktown Heights, NY, USA, Feb 3, 2003

Atomic-scale mechanisms of high-k atomic layer deposition
IMEC, Leuven, Belgium, Jan 7, 2003

Growth and structure of ultra-thin oxide films on Si and InP surfaces
California Institute of Technology (Caltech), Pasadena, CA, USA, Oct 11, 2002

Dielectrics on Si and InP surfaces: nucleation, growth, and structure
University of California Los Angeles (UCLA), Los Angeles, CA, USA, Oct 8, 2002

Vibrational spectroscopy of oxide-supported metal particles: probing structure, reactivity, and charge
Harvard University, Cambridge, MA, USA, Harvard Chemistry Seminar, Mar 29, 2002

From atoms to crystallites: structure and reactivity of oxide-supported transition metal particles
Rutgers University, Piscataway, NJ, USA, Surface Science Seminar, Nov 8, 2001

From atoms to crystallites: structure and reactivity of oxide-supported metal particles
Agere Systems at Lucent Technologies’ Bell Laboratories, Murray Hill, NJ, USA, May 18, 2001

Size-dependent reactivity and electronic structure of oxide-supported Rh, Pd, and Ir particles
Humboldt-Universität zu Berlin, Germany, Surface Science Research Seminar, Jan 24, 2000

 

Contributed presentations

Deuterium passivation of TiN/HfO2/Al2O3/InGaAs gate stacks: Pressure and temperature dependence (poster)
48th IEEE Semiconductor Interface Specialists Conference (SISC), San Diego, CA, Dec 7, 2017

Deuterium passivation of TiN/HfO2/Al2O3/InGaAs gate stacks: Pressure and temperature dependence (poster)
11th IEEE Nanotechnology Symposium, Albany, NY, Nov 15, 2017

Ferroelectric HfO2 for CMOS-compatible synaptic devices
2017 Materials Research Society (MRS) Spring Meeting, Phoenix, AZ, Apr 20, 2017

Stabilizing ferroelectric HfO2: Non-monoclinic phase formation and loss studied by temperature-dependent synchrotron X-ray diffraction
47th IEEE Semiconductor Interface Specialists Conference (SISC), San Diego, CA, Dec 8, 2016

TiN-gated ferroelectric BaTiO3 devices on Si and Si1-xGex
2016 Materials Research Society (MRS) Spring Meeting, Phoenix, AZ, Mar 31, 2016

Titanium-silicide-based gate electrodes: Thermal behavior and Si(Ge) channel MOSFET performance
2015 Materials Research Society (MRS) Spring Meeting, San Francisco, CA, Apr 9, 2015

TiSix/TiN full metal gates for dual-channel gate-first CMOS technology
44th IEEE Semiconductor Interface Specialists Conference (SISC), Arlington, VA, Dec 7, 2013

Impact of interfacial oxide scavenging on SiGe channel pFET performance and reliability
Workshop 'Functional Oxides for Integration in Micro- and Nano-Electronics', Autrans, France, Apr 9, 2013

Aggressive SiGe channel gate stack scaling by remote oxygen scavenging: pFET performance and reliability
Pacific Rim Meeting on Electrochemical and Solid-State Science (PRiME) and 222nd ECS Meeting, Honolulu, HI, Oct 10, 2012

Low-resistivity W / TaMN / TiN full metal gate for aggressive MOSFET scaling
42nd IEEE Semiconductor Interface Specialists Conference (SISC), Arlington, VA, Dec 3, 2011

Epitaxial strontium oxide layers on silicon for gate-first and gate-last TiN/HfO2 gate stack scaling
17th Conference on Insulating Films on Semiconductors (INFOS), Grenoble, France, Jun 23, 2011

TiO2-based higher-k gate stacks: Understanding and mitigating oxygen migration
39th IEEE Semiconductor Interface Specialists Conference (SISC), San Diego, CA, Dec 13, 2008

Fluorine in metal gate / high-k gate stacks: Diffusion and electrically active states (poster)
38th IEEE Semiconductor Interface Specialists Conference (SISC), Arlington, VA, Dec 6, 2007

Aluminum nitride, oxide, and oxynitride capping layers for poly-Si/HfSiO threshold voltage control (poster)
37th IEEE Semiconductor Interface Specialists Conference (SISC), San Diego, CA, Dec 7, 2006

Nitrogen in poly-Si/HfSiO gate stacks: Carrier mobility impact of traps and fixed charge
36th IEEE Semiconductor Interface Specialists Conference (SISC), Arlington, VA, Dec 2, 2005

Poly-Si/high-k gate stacks with near-ideal threshold voltage and mobility
IEEE VLSI-TSA International Symposium on VLSI Technology (VLSI-TSA-Tech), Hsinchu, Taiwan, R.O.C., Apr 26, 2005

Novel gate oxides on silicon and germanium: passivation and growth chemistry
European Materials Research Society (E-MRS) Spring Meeting 2004, Strasbourg, France, May 28, 2004

Si and Ge surface preparation for high-k deposition
2004 Wafer Cleaning and Surface Preparation Conference, SEMATECH, Austin, TX, USA, May 6, 2004

Self-assembled monolayers of conjugated thiols studied by infrared spectroscopy: structure and metal electrode deposition
226th American Chemical Society (ACS) National Meeting, New York, NY, USA, Sep 10, 2003

Gate oxide atomic layer deposition studied by in situ infrared spectroscopy
European Materials Research Society (E-MRS) Spring Meeting 2003, Strasbourg, France, Jun 10, 2003

Surface engineering pathways to less than 1 nm EOT
International SEMATECH, Austin, TX, USA, Apr 30, 2003

Nucleation, growth, and structure of alternative gate oxides
Seventeenth Annual Symposium of the Laboratory of Surface Modification, Rutgers University, Piscataway, NJ, USA, Feb 27, 2003

Atomic-scale mechanisms of ultra-thin dielectric growth
Materials Research Society (MRS) 2002 Fall Meeting, Boston, MA, USA, Dec 2, 2002

Trimethylaluminum-initiated ALD growth of Al2O3 on Si: an in-situ infrared study
AVS 49th International Symposium, Denver, CO, USA, Nov 5, 2002

Infrared studies of indium phosphide surface chemistry (poster)
11th International Conference on Metal-Organic Vapour Phase Epitaxy (MOVPE-11), Berlin, Germany, Jun 3, 2002

From atoms to multilayers – adsorption on alumina-supported Rh, Pd, and Ir aggregates (poster)
18th European Conference on Surface Science (ECOSS), Vienna, Austria, Sep 21, 1999

Metal particles on oxide surfaces – electronic properties and metal-substrate interaction (poster)
Spring Meeting of the Section “Solid State Physics” of the German Physical Society, Münster, Germany, Mar 25, 1999

Size-dependent reactivity of supported Rh particles (poster)
9th International Conference on Vibrations at Surfaces, Hayama, Japan, Oct 14, 1998

Particle-size-dependent reactivity studies of alumina-supported Rh (poster)
European Research Conference “Fundamental Aspects in Surface Science: Elementary Processes in Surface Reactions”, Acquafredda di Maratea, Italy, Jun 21, 1998

Adsorption, dissociation, and reaction on Rh aggregates on an aluminum oxide film
62nd General Conference of the German Physical Society (DPG), Regensburg, Germany, Mar 26, 1998

Structure and reactivity of Rh deposits on an alumina film (poster)
Gordon Research Conference “Chemical Reactions at Surfaces”, Ventura, CA, USA, Feb 19, 1997

Morphology of clean and CO-covered Rh deposits on an alumina film (poster)
Workshop “Advances in Oxide Surface Physics”, Les Houches, France, Jan 14, 1997

Growth and adsorption properties of Rh on Al2O3/NiAl(110)
Spring Meeting of the Section “Solid State Physics” of the German Physical Society, Regensburg, Germany, Mar 27, 1996

 

U.S. PATENTS

C.A. Dubourdieu, M.M. Frank, V. Narayanan, Semiconductor devices containing an epitaxial perovskite/doped strontium titanate structure, U.S. patent 9,590,100 (issued Mar 7, 2017).

T. Ando, M.M. Frank, P. Kerber, V. Narayanan, High-K gate dielectric and metal gate conductor stack for planar field effect transistors formed on type III-V semiconductor material and silicon germanium semiconductor material, U.S. patent 9,472,553 (issued Oct 18, 2016).

T. Ando, R.H. Dennard, M.M. Frank, Method of lateral oxidation of NFET and PFET high-K gate stacks, U.S. patent 9,466,492 (issued Oct 11, 2016).

T. Ando, M.P. Chudzik, M. Dai, M.M. Frank, D.F. Hilscher, R. Krishnan, B.P. Linder, C. Ortolland, J.F. Shepard, Jr., Hydroxyl group termination for nucleation of a dielectric metallic oxide, U.S. patent 9,373,501 (issued Jun 21, 2016).

T. Ando, M.M. Frank, P. Kerber, V. Narayanan, High-K gate dielectric and metal gate conductor stack for planar field effect transistors formed on type III-V semiconductor material and silicon germanium semiconductor material, U.S. patent 9,362,282 (issued Jun 7, 2016).

C.A. Dubourdieu, M.M. Frank, V. Narayanan, Semiconductor devices containing an epitaxial perovskite/doped strontium titanate structure, U.S. patent 9,299,799 (issued Mar 29, 2016).

M.M. Frank, P. Hashemi, A. Khakifirooz, A. Reznicek, Stressed nanowire stack for field effect transistor, U.S. patent 9,287,358 (issued Mar 15, 2016).

N.L. Breil, C. Cabral, Jr., M.M. Frank, C. Ortolland, Gate electrode with stabilized metal semiconductor alloy-semiconductor stack, U.S. patent 9,166,014 (issued Oct 20, 2015).

C.A. Dubourdieu, M.M. Frank, B. Rajendran, A.G. Schrott, Phase change material cell with piezoelectric or ferroelectric stress inducer liner, U.S. patent 9,159,920 (issued Oct 13, 2015).

T. Ando, C. Choi, M.M. Frank, U. Kwon, V. Narayanan, Fabrication of low threshold voltage and inversion oxide thickness scaling for a high-k metal gate p-type MOSFET, U.S. patent 9,105,745 (issued Aug 11, 2015).

C.A. Dubourdieu, M.M. Frank, V. Narayanan, Engineering multiple threshold voltages in an integrated circuit, U.S. patent 9,041,082 (issued May 26, 2015).

N.L. Breil, C. Cabral, Jr., M.M. Frank, C. Ortolland, Gate electrode with stabilized metal semiconductor alloy-semiconductor stack, U.S. patent 9,034,749 (issued May 19, 2015).

M.M. Frank, Floating gate device with oxygen scavenging element, U.S. patent 8,941,169 (issued Jan 27, 2015).

M.M. Frank, I. Lauer, J.W. Sleight, Gate stack of boron semiconductor alloy, polysilicon and high-K gate dielectric for low voltage applications, U.S. patent 8,928,064 (issued Jan 6, 2015).

M.M. Frank, High-k transistors with low threshold voltage, U.S. patent 8,927,409 (issued Jan 6, 2015).

M.M. Frank, Floating gate device with oxygen scavenging element, U.S. patent 8,912,061 (issued Dec 16, 2014).

M.M. Frank, I. Lauer, J.W. Sleight, Gate stack including a high-k gate dielectric that is optimized for low voltage operations, U.S. patent 8,901,616 (issued Dec 2, 2014).

M.M. Frank, I. Lauer, J.W. Sleight, Gate stack including a high-k gate dielectric that is optimized for low voltage operations, U.S. patent 8,900,952 (issued Dec 2, 2014).

C.A. Dubourdieu, M.M. Frank, Controlling ferroelectricity in dielectric films by process induced uniaxial strain, U.S. patent 8,890,112 (issued Nov 18, 2014).

T. Ando, M.M. Frank, V. Narayanan, Reducing the inversion oxide thickness of a high-k stack fabricated on high mobility semiconductor material, U.S. patent 8,865,551 (issued Oct 21, 2014).

M.M. Frank, I. Lauer, J.W. Sleight, Gate stack of boron semiconductor alloy, polysilicon and high-k gate dielectric for low voltage applications, U.S. patent 8,859,410 (issued Oct 14, 2014).

T. Ando, M.M. Frank, V. Narayanan, Reducing the inversion oxide thickness of a high-K stack fabricated on high mobility semiconductor material, U.S. patent 8,853,751 (issued Oct 7, 2014).

C. Cabral, Jr., J.B. Chang, M.P. Chudzik, M.M. Frank, M.A. Guillorn, C. Lavoie, S. Narasimha, V. Narayanan, Field effect transistor device having a hybrid metal gate stack, U.S. patent 8,836,048 (issued Sep 16, 2014).

T. Ando, M. Dai, M.M. Frank, B.P. Linder, S. Siddiqui, Structure and method to form input/output devices, U.S. patent 8,836,037 (issued Sep 16, 2014).

M.M. Frank, I. Lauer, J.W. Sleight, Gate electrode optimized for low-voltage operation, U.S. patent 8,802,527 (issued Aug 12, 2014).

C.A. Dubourdieu, D.J. Frank, M.M. Frank, V. Narayanan, P.M. Solomon, T.N. Theis, Ferroelectric semiconductor transistor devices having gate modulated conductive layer, U.S. patent 8,785,995 (issued Jul 22, 2014).

M.M. Frank, I. Lauer, J.W. Sleight, Gate electrode optimized for low-voltage operation, U.S. patent 8,778,759 (issued Jul 15, 2014).

M.P. Chudzik, M.M. Frank, H.L. Ho, M.J. Hurley, R. Jha, N. Moumen, V. Narayanan, D.-G. Park, V.K. Paruchuri, Changing effective work function using ion implantation during dual work function metal gate integration, U.S. patent 8,753,936 (issued Jun 17, 2014).

J. Cai, E.A. Cartier, M.M. Frank, M.H. Khater, Fabrication of devices having different interfacial oxide thickness via lateral oxidation, U.S. patent 8,716,807 (issued May 6, 2014).

M.M. Frank, A. Kumar, V. Narayanan, V.K. Paruchuri, J. Sleight, Techniques for enabling multiple Vt devices using high-K metal gate stacks, U.S. patent 8,680,623 (issued Mar 25, 2014).

M.M. Frank, High-k transistors with low threshold voltage, U.S. patent 8,674,456 (issued Mar 18, 2014).

M.M. Frank, D. Guo, S.-J. Hen, K.-T. Shiu, Controlling threshold voltage in carbon based field effect transistors, U.S. patent 8,598,665 (issued Dec 3, 2013).

M.M. Frank, High-k transistors with low threshold voltage, U.S. patent 8,598,027 (issued Dec 3, 2013).

C.A. Dubourdieu, M.M. Frank, B. Rajendran, A.G. Schrott, Phase change material cell with stress inducer liner, U.S. patent 8,559,217 (issued Oct 15, 2013).

M.M. Frank, Metal insulator metal structure with remote oxygen scavenging, U.S. patent 8,541,867 (issued Sep 24, 2013).

M.M. Frank, High-k transistors with low threshold voltage, U.S. patent 8,541,842 (issued Sep 24, 2013).

M.M. Frank, D. Guo, S.-J. Hen, K.-T. Shiu, Controlling threshold voltage in carbon based field effect transistors, U.S. patent 8,420,474 (issued Apr 16, 2013).

P. Adusumilli, A. Callegari, J.B. Chang, C. Choi, M.M. Frank, M.A. Guillorn, V. Narayanan, Field-effect transistor device having a metal gate stack with an oxygen barrier layer, U.S. patent 8,415,677 (issued Apr 9, 2013).

C.A. Dubourdieu, M.M. Frank, Controlling ferroelectricity in dielectric films by process induced uniaxial strain, U.S. patent 8,389,300 (issued Mar 5, 2013).

T. Ando, C. Choi, M.M. Frank, V. Narayanan, Scavenging metal stack for a high-k gate dielectric, U.S. patent 8,367,496 (issued Feb 5, 2013).

J. Cai, E.A. Cartier, M.M. Frank, M.H. Khater, Fabrication of devices having different interfacial oxide thickness via lateral oxidation, U.S. patent 8,304,306 (issued Nov 6, 2012).

M.M. Frank, A. Kumar, V. Narayanan, V.K. Paruchuri, J. Sleight, Techniques for enabling multiple Vt devices using high-K metal gate stacks, U.S. patent 8,212,322 (issued Jul 3, 2012).

N.A. Bojarczuk, Jr., C. Cabral, Jr., E.A. Cartier, M.W. Copel, M.M. Frank, E.P. Gousev, S. Guha, R. Jammy, V. Narayanan, V.K. Paruchuri, Selective implementation of barrier layers to achieve threshold voltage control in CMOS device fabrication with high-k dielectrics, U.S. patent 8,193,051 (issued Jun 5, 2012).

S. Assefa, J.O. Chu, M.M. Frank, W.M. Green, Y.-h. Kim, G.G. Totir, J. Van Campenhout, Y.A. Vlasov, Y. Zhang, Suspended germanium photodetector for silicon waveguide, US patent 8,178,382 (issued May 15, 2012).

T. Ando, C. Choi, M.M. Frank, V. Narayanan, Scavenging metal stack for a high-k gate dielectric, U.S. patent 7,989,902 (issued Aug 2, 2011).

N.A. Bojarczuk, Jr., C. Cabral, Jr., E.A. Cartier, M.W. Copel, M.M. Frank, E.P. Gousev, S. Guha, R. Jammy, V. Narayanan, V.K. Paruchuri, Selective implementation of barrier layers to achieve threshold voltage control in CMOS device fabrication with high-k dielectrics, U.S. patent 7,928,514 (issued Apr 19, 2011).

S. Assefa, J.O. Chu, M.M. Frank, W.M. Green, Y.-h. Kim, G.G. Totir, J. Van Campenhout, Y.A. Vlasov, Y. Zhang, Suspended germanium photodetector for silicon waveguide, US patent 7,902,620 (issued Mar 8, 2011)

P.M. Vereecken, V.S. Basker, C. Cabral, Jr., E.I. Cooper, H. Deligianni, M.M. Frank, R. Jammy, V.K. Paruchuri, K.L. Saenger, X. Shao, Gate stack engineering by electrochemical processing utilizing through-gate-dielectric current flow, U.S. patent 7,868,410 (issued Jan 11, 2011).

E.A. Cartier, M.W. Copel, M.M. Frank, E.P. Gousev, P.C. Jamison, R. Jammy, B.P. Linder, V. Narayanan, Low threshold voltage semiconductor device with dual threshold voltage control means, U.S. patent 7,858,500 (issued Dec 28, 2010).

U. Kwon, S.A. Krishnan, T. Ando, M.P. Chudzik, M.M. Frank, W.K. Henson, R. Jha, Y. Liang, V. Narayanan, R. Ramachandran, K.K.H. Wong, Semiconductor device having dual metal gates and method of manufacture, U.S. patent 7,838,908 (issued Nov 23, 2010).

N.A. Bojarczuk, Jr., C. Cabral, Jr., E.A. Cartier, M.W. Copel, M.M. Frank, E.P. Gousev, S. Guha, R. Jammy, V. Narayanan, V.K. Paruchuri, Selective implementation of barrier layers to achieve threshold voltage control in CMOS device fabrication with high k dielectrics, U.S. patent 7,745,278 (issued Jun 29, 2010).

M.M. Frank, A. Kumar, V. Narayanan, V.K. Paruchuri, J. Sleight, Techniques enabling multiple Vt devices using high-k metal gate stacks, U.S. Patent 7,718,496 (issued May 18, 2010).

E.A. Cartier, M.W. Copel, M.M. Frank, E.P. Gousev, P.C. Jamison, R. Jammy, B.P. Linder, V. Narayanan, Low threshold voltage semiconductor device with dual threshold voltage control means, U.S. patent 7,655,994 (issued Feb 2, 2010).

M.M. Frank, A. Reznicek, E.P. Gousev, E.A. Cartier, Method of forming gate stack for semiconductor electronic device, U.S. Patent 7,560,361 (issued Jul 14, 2009).

M.M. Frank, S.J. Koester, J.A. Ott, H. Shang, Method of forming a semiconductor structure using a non-oxygen chalcogen passivation treatment, U.S. patent 7,521,376 (issued Apr 21, 2009).

A.C. Callegari, M.M. Frank, R. Jammy, D.L. Lacey, F.R. McFeely, S. Zafar, Method of forming HfSiN metal for n-FET applications, U.S. patent 7,521,346 (issued Apr 21, 2009).

N.A. Bojarczuk, Jr., C. Cabral, Jr., E.A. Cartier, M.W. Copel, M.M. Frank, E.P. Gousev, S. Guha, R. Jammy, V. Narayanan, V.K. Paruchuri, Selective implementation of barrier layers to achieve threshold voltage control in CMOS device fabrication with high-k dielectrics, U.S. patent 7,479,683 (issued Jan 20, 2009).

N.A. Bojarczuk, Jr., C. Cabral, Jr., E.A. Cartier, M.W. Copel, M.M. Frank, E.P. Gousev, S. Guha, R. Jammy, V. Narayanan, V.K. Paruchuri, Selective implementation of barrier layers to achieve threshold voltage control in CMOS device fabrication with high k dielectrics, U.S. patent 7,452,767 (issued Nov 18, 2008).

P.M. Vereecken, V.S. Basker, C. Cabral, Jr., E.I. Cooper, H. Deligianni, M.M. Frank, R. Jammy, V.K. Paruchuri, K.L. Saenger, X. Shao, Gate stack engineering by electrochemical processing utilizing through-gate-dielectric current flow, U.S. patent 7,368,045 (issued May 6, 2008).

N.A. Bojarczuk, Jr., C. Cabral, Jr., E.A. Cartier, M.M. Frank, E.P. Gousev, S. Guha, P.C. Jamison, R. Jammy, V. Narayanan, V.K. Paruchuri, Nitrogen-containing field effect transistor gate stack containing a threshold voltage control layer formed via deposition of a metal oxide, U.S. patent 7,242,055 (issued Jul 10, 2007).

M.M. Frank, Y. Chabal. G.D. Wilk, M. Green, Process for fabricating a semiconductor device having an insulating layer formed over a semiconductor substrate, U.S. patent 7,226,677 (issued May 29, 2007).

N.A. Bojarczuk, JR., C. Cabral, JR., E.A. Cartier, M.W. Copel, M.M. Frank, E.P. Gousev, S. Guha, R. Jammy, V. Narayanan, V.K. Paruchuri, Selective implementation of barrier layers to achieve threshold voltage control in CMOS device fabrication with high k dielectrics, U.S. patent 7,105,889 (issued Sep 12, 2006).

M.M. Frank, Y. Chabal, G.D. Wilk, Semiconductor device using an insulating layer having a seed layer, U.S. patent 6,825,538 (issued Nov 30, 2004).