Stephan Paredes  Stephan Paredes photo       

contact information

Senior Engineer - Advanced Thermal Packaging
Zurich Research Laboratory, Zurich, Switzerland
  +41dash44dash724dash84dash81

links



2013

Thermal power plane for integrated circuits
Harry Barowski, Thomas Brunschwiler, Hubert Harrer, Andreas Huber, Bruno Michel, Tim Niggemeier, Stephan Paredes, Jochen Supper
US Patent 8,427,833

Optimized semiconductor packaging in a three-dimensional stack
Harry Barowski, Thomas Brunschwiler, Hubert Harrer, Andreas Huber, Bruno Michel, Tim Niggemeier, Stephan Paredes, Jochen Supper
US Patent 8,476,112


2012

Heat Sink Integrated Power Delivery and Distribution for Integrated Circuits
H. Barowski, T. Brunschwiler, H. Harrer, A. Huber, B. Michel, T. Niggemeier, S. Paredes, J. Supper
US Patent 20,120,106,074


2011

Integrated circuit package connected to a data transmission medium
Harry Barowski, Thomas Brunschwiler, Roger F Dangel, Hubert Harrer, Andreas Huber, Norbert M Meier, Bruno Michel, Tim Niggemeier, Stephan Paredes, Jochen Supper, others
US Patent App. 13/312,327