Kirsten Moselund  Kirsten Moselund photo       

contact information

Research Staff Member
Zurich Research Laboratory, Zurich, Switzerland
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Professional Associations

Professional Associations:  IEEE   |  IEEE Electron Devices Society (EDS)


2017

Observation of twin-free GaAs nanowire growth using template-assisted selective epitaxy
Knoedler, Moritz and Bologna, Nicolas and Schmid, Heinz and Borg, Mattias and Moselund, Kirsten E and Wirths, Stephan and Rossell, Marta D and Riel, Heike
Crystal Growth & Design, ACS Publications, 2017
Abstract

How Non-ideality Effects Deteriorate the Performance of Tunnel FETs
A. Schenk, S. Sant, K. Moselund, H. Riel
2017 IEEE Electron Devices Technology and Manufacturing Conference (EDTM 2017), Toyoma, Japan (invited)

Length Scale of Diffusive Phonon Transport in Suspended Thin Silicon Nanowires
N. Raja, Shyamprasad and Rhyner, Reto and Vuttivorakulchai, Kantawong and Luisier, Mathieu and Poulikakos, Dimos
Nano letters 17(1), 276--283, ACS Publications, 2017
Abstract

Ballistic one-dimensional transport in InAs nanowires monolithically integrated on silicon
Gooth, J and Schaller, V and Wirths, S and Schmid, H and Borg, M and Bologna, N and Karg, S and Riel, H
Applied Physics Letters 110(8), 083105, AIP Publishing, 2017
Abstract

The impact of hetero-junction and oxide-interface traps on the performance of InAs/Si tunnel FETs
Schenk, Andreas and Sant, Saurabh and Moselund, Kirsten and Riel, Heike
Junction Technology (IWJT), 2017 17th International Workshop on, pp. 27--30
Abstract

Monolithic integration of III-V nanostructures for electronic and photonic applications
Mayer, B and Wirths, S and Schmid, H and Mauthe, S and Convertino, C and Baumgartner, Y and Czornomaz, L and Sousa, M and Riel, H and Moselund, KE
Low-Dimensional Materials and Devices 2017, pp. 103490L
Abstract

Investigation of InAs/GaSb tunnel diodes on SOI
C. Convertino, D. Cutaia, H. Schmid, N. Bologna, P. Paletti, A.M. Ionescu, H. Riel, K.E. Moselund
2017 EUROSOI/ULIS

High-Mobility GaSb Nanostructures Cointegrated with InAs on Si
M. Borg, H. Schmid, J. Gooth, M. D. Rossell, D. Cutaia, M. Knoedler, N. Bologna, S. Wirths, K. E. Moselund, H. Riel
ACS Nano 11(3), 2554-2560, 2017

Ballistic One-Dimensional InAs Nanowire Cross-Junction Interconnects
J. Gooth, M. Borg, H. Schmid, V. Schaller, S. Wirths, K. Moselund, M. Luisier, S. Karg, H. Riel
Nano Letters 17(4), 2596-2602, 2017


2016

Impact of Trap-Assisted Tunneling and Channel Quantization on InAs/Si Hetero Tunnel FETs
S. Sant, A. Schenk, K. Moselund, H. Riel
74th IEEE Annual Device Research Conference (DRC), Newark, DE, 2016

Integration of III--V heterostructure tunnel FETs on Si using Template Assisted Selective Epitaxy (TASE)
Moselund, Kirsten Emilie and Cutaia, Davide and Schmid, Heinz and Borg, Mattias and Sant, Saurabh and Schenk, Andreas and Riel, Heike
Compound Semiconductor Week (CSW)[Includes 28th International Conference on Indium Phosphide & Related Materials (IPRM) & 43rd International Symposium on Compound Semiconductors (ISCS), 2016, pp. 1--1
Abstract

Monolithic integration of multiple III-V semiconductors on Si for MOSFETs and TFETs
Schmid, H and Cutaia, D and Gooth, J and Wirths, S and Bologna, N and Moselund, KE and Riel, H
Electron Devices Meeting (IEDM), 2016 IEEE International, pp. 3--6
Abstract

III-V heterojunction nanowire tunnel FETs monolithically integrated on silicon
Moselund, Kirsten E and Cutaia, Davide and Schmid, Heinz and Borg, M and Sant, Saurabh and Schenk, Andreas and Riel, Heike
Nanotechnology Materials and Devices Conference (NMDC), 2016 IEEE, pp. 1--2
Abstract

Complementary III--V heterostructure tunnel FETs
Moselund, Kirsten E and Cutaia, D and Schmid, Heinz and Riel, Heike and Sant, S and Schenk, A
Solid-State Device Research Conference (ESSDERC), 2016 46th European, pp. 403--407
Abstract

Complementary III--V heterojunction lateral NW Tunnel FET technology on Si
Cutaia, Davide and Moselund, Kirsten E and Schmid, Heinz and Borg, M and Olziersky, Antonis and Riel, Heike
VLSI Technology, 2016 IEEE Symposium on, pp. 1--2
Abstract

Lateral InAs/Si p-Type Tunnel FETs Integrated on Si—Part 1: Experimental Devices
Moselund, Kirsten Emilie and Cutaia, Davide and Schmid, Heinz and Borg, Mattias and Sant, Saurabh and Schenk, Andreas and Riel, Heike
IEEE Transactions on Electron Devices 63(11), 4233--4239, IEEE, 2016
Abstract

Lateral InAs/Si p-Type Tunnel FETs Integrated on Si—Part 2: Simulation Study of the Impact of Interface Traps
Sant, Saurabh and Moselund, Kirsten and Cutaia, Davide and Schmid, Heinz and Borg, Mattias and Riel, Heike and Schenk, Andreas
IEEE Transactions on Electron Devices 63(11), 4240--4247, IEEE, 2016
Abstract

III??? V-based hetero tunnel FETs: A simulation study with focus on non-ideality effects
Schenk, Andreas and Sant, Saurabh and Moselund, Kirsten and Riel, Heike
2016 Joint International EUROSOI Workshop and International Conference on Ultimate Integration on Silicon (EUROSOI-ULIS), pp. 9--12
Abstract

Integration of III-V heterostructure tunnel FETs on Si using Template Assisted Selective Epitaxy (TASE)
K.E. Moselund, D. Cutaia, H. Schmid, M. Borg, S. Sant, A. Schenk, H. Riel
IEEE Compound Semiconductor Week (CSW). Includes 28th Int'l Conf. on Indium Phosphide & Related Materials (IPRM) & 43rd Int'l Symp. on Compound Semiconductors (ISCS), 2016

Ballistic transport and high thermopower in one-dimensional InAs nanowires
S. Karg, V. Schaller, A. Gaul, K. Moselund, H. Schmid, B. Gotsmann, J. Gooth, H. Riel
46th European Solid-State Device Research Conference (ESSDERC), 2016

Investigation of doping in InAs/GaSb hetero-junctions for tunnel-FETs
D. Cutaia, H. Schmid, M. Borg, K. Moselund, N. Bologna, A. Olziersky, A. Ionescu, H. Riel
Silicon Nanoelectronics Workshop (SNW), 2016

Lateral InAs/Si p-Type Tunnel FETs Integrated on Si. Part 2: Simulation Study of the Impact of Interface Traps
S. Sant, K. Moselund, D. Cutaia, H. Schmid, M. Borg, H. Riel, A. Schenk
IEEE Transactions on Electron Devices 63(11), 2016

Lateral InAs/Si p-Type Tunnel FETs Integrated on Si. Part 1: Experimental Devices
K.E. Moselund, D. Cutaia, H. Schmid, M. Borg, S. Sant, A. Schenk, H. Riel
IEEE Transactions on Electron Devices 63(11), 4233-4239, 2016

Complementary III-V Heterojunction Lateral NW Tunnel FET Technology on Si
D. Cutaia, K.E. Moselund, H. Schmid, M. Borg, A. Olziersky, H. Riel
Symposium on VLSI Technology, 2016


2015

Fabrication and Analysis of Vertical p-type InAs-Si Nanowire Tunnel FETs
D. Cutaia, K. E. Moselund, M. Borg, H. Schmid, L. Gignac, C.M. Breslin, H. Riel
2015 Joint International EUROSOI Workshop and International Conference on Ultimate Integration on Silicon (EUROSOI-ULIS), pp. 61-64

(Invited) Comparative Simulation Study of InAs/Si and All-III-V Hetero Tunnel FETs
Schenk, Andreas and Sant, Saurabh and Moselund, Kirsten and Riel, Heike
ECS Transactions 66(5), 157--169, The Electrochemical Society, 2015
Abstract

III--V device integration on Si using template-assisted selective epitaxy
Schmid, Heinz and Borg, Mattias and Moselund, Kirsten and Gignac, Lynne and Breslin, Chris and Bruley, John and Cutaia, Davide and Riel, Heike
2015 73rd Annual Device Research Conference (DRC), pp. 255--256
Abstract

III--V device integration on Si using template-assisted selective epitaxy
Schmid, Heinz and Borg, Mattias and Moselund, Kirsten and Gignac, Lynne and Breslin, Chris and Bruley, John and Cutaia, Davide and Riel, Heike
2015 73rd Annual Device Research Conference (DRC), pp. 255--256
Abstract

III-V device integration on Si using template-assisted selective epitaxy
H. Schmid, M. Borg, K. Moselund, L. Gigna, C. Breslin, J. Bruley, D. Cutaia, H. Riel
73rd IEEE Annual Device Research Conference (DRC), 2015

Comparative Simulation Study of InAs/Si and All-III-V Hetero Tunnel FETs (invited)
Andreas Schenk, Saurabh Sant, Kirsten Moselund, Heike Riel
ECS Transations, 2015

Vertical InAs-Si Gate-All-Around Tunnel FETs Integrated on Si Using Selective Epitaxy in Nanotube Templates
D. Cutaia, K.E. Moselund, M. Borg, H. Schmid, L. Gignac, C.M. Breslin, S. Karg, E. Uccelli, H. Riel
IEEE Journal of the Electron Devices Society 3(3), 176-183, 2015

Mechanisms of template-assisted selective epitaxy of InAs nanowires on Si
Mattias Borg, Heinz Schmid, Kirsten E. Moselund, Davide Cutaia and Heike Riel
J. Appl. Phys. 117, 144303, 2015

Template-assisted selective epitaxy of III-V nanoscale devices for co-planar heterogeneous integration with Si
H. Schmid, M. Borg, K. Moselund, L. Gignac, C.M. Breslin, J. Bruley, D. Cutaia, H. Riel
Applied Physics Letters106, 233101, 2015


2014

Vertical III--V nanowire device integration on Si (100)
Borg, Mattias and Schmid, Heinz and Moselund, Kirsten E and Signorello, Giorgio and Gignac, Lynne and Bruley, John and Breslin, Chris and Das Kanungo, Pratyush and Werner, Peter and Riel, Heike
Nano letters 14(4), 1914--1920, ACS Publications, 2014
Abstract

Vertical III--V nanowire device integration on Si (100)
Borg, Mattias and Schmid, Heinz and Moselund, Kirsten E and Signorello, Giorgio and Gignac, Lynne and Bruley, John and Breslin, Chris and Das Kanungo, Pratyush and Werner, Peter and Riel, Heike
Nano letters 14(4), 1914--1920, ACS Publications, 2014
Abstract

Vertical III-V Nanowire Device Integration on Si(100)
Mattias Borg, Heinz Schmid, Kirsten E. Moselund, Giorgio Signorello, Lynne Gignac, John Bruley, Chris Breslin, Pratyush Das Kanungo, Peter Werner, and Heike Riel
Nano Letters 14(4), 1914, 2014


2013

In situ doping of catalyst-free InAs nanowires
H. Ghoneim, P. Mensch, H. Schmid, C. D Bessire, R. Rhyner, A. Schenk, C. Rettner, S. Karg, K. E Moselund, H. Riel, M. T Björk
Nanotechnology 23(50), 505708, IOP Publishing, 2013

Tunneling and Occupancy Probabilities: How Do They Affect Tunnel-FET Behavior?
Luca De Michielis, Livio Lattanzio, Kirsten E Moselund, Heike Riel, Adrian M Ionescu
Electron Device Letters, IEEE 34(6), 726-728, IEEE, 2013

Interface State Density of Single Vertical Nanowire MOS Capacitors
P. Mensch, K. Moselund, S. Karg, E. Lörtscher, M. Björk, H. Riel
IEEE Transactions on Nanotechnology 12(12), 279-282, IEEE, 2013


2012

InAs–Si Heterojunction Nanowire Tunnel Diodes and Tunnel FETs
H. Riel, K. E. Moselund, C. Bessire, M. T. Björk, A. Schenk, H. Ghoneim, H. Schmid
Invited, 2012 IEEE International Electron Devices Meeting (IEDM), pp. 16.6.1-16.6.4

InAs-Si Nanowire Heterojunction Tunnel FETs
K.E. Moselund, H. Schmid, C. Bessire, M.T. Bjork, M.T, H. Ghoneim, H. Riel
Electron Device Letters 33(10), 1453-1455 , IEEE, 2012


2011

Silicon nanowire tunnel fets: low-temperature operation and influence of high-gate dielectric
Moselund, Kirsten E and Bjork, Mikael T and Schmid, Heinz and Ghoneim, Hersham and Karg, Siegfried and Lortscher, E and Riess, Walter and Riel, H
IEEE Transactions on Electron Devices 58(9), 2911--2916, IEEE, 2011
Abstract

Corner Effect and Local Volume Inversion in SiNW FETs
Luca De Michielis, Kirsten Emilie Moselund, Luca Selmi, Adrian Mihai Ionescu
Nanotechnology, IEEE Transactions on 10(4), 810--816, IEEE, 2011

Silicon Nanowire Tunnel FETs: Low-Temperature Operation and Influence of High-κ Gate Dielectric
KE Moselund, MT Björk, H. Schmid, H. Ghoneim, S. Karg, E. Lörtscher, W. Riess, H. Riel
IEEE Transactions on Electron Devices 58(9), 2911-2916, 2011

CV measurements of single vertical nanowire capacitors
P Mensch, KE Moselund, S Karg, E Lortscher, MT Bjork, H Schmid, H Riel
69th Annual Device Research Conference (DRC), pp. 119-120, 2011

Fabrication of vertical InAs-Si heterojunction tunnel field effect transistors
H Schmid, KE Moselund, MT Bjork, M Richter, H Ghoneim, CD Bessire, H Riel
69th Annual Device Research Conference (DRC), pp. 181-182, 2011


2010

Si-InAs heterojunction Esaki tunnel diodes with high current densities
MT Björk, H. Schmid, CD Bessire, KE Moselund, H. Ghoneim, S. Karg, E. Lörtscher, H. Riel
Applied Physics Letters97, 163501, 2010

The high-mobility bended n-channel silicon nanowire transistor
Kirsten Emilie Moselund, Mohammad Najmzadeh, Peter Dobrosz, Sarah H Olsen, Didier Bouvet, Luca De Michielis, Vincent Pott, Adrian M Ionescu
IEEE Transactions onElectron Devices 57(4), 866-876, 2010

VLS-grown silicon nanowires — Dopant deactivation and tunnel FETs
MT Björk, KE Moselund, H Schmid, H Ghoneim, S Karg, E Lörtscher, J Knoch, W Riess, H Riel
Silicon Nanoelectronics Workshop (SNW), pp. 1-2, 2010

Solid-state diffusion as an efficient doping method for silicon nanowires and nanowire field effect transistors
K. E. Moselund, H. Ghoneim, H. Schmid, MT Björk, E. Lörtscher, S. Karg, G. Signorello, D. Webb, M. Tschudy, R. Beyeler, others
Nanotechnology 21(43), 435202, 2010

Si-InAs heterojunction Esaki tunnel diodes with high current densities
MT Bjork, H Schmid, CD Bessire, KE Moselund, H Ghoneim, S Karg, E Lortscher, H Riel
Applied Physics Letters 97(16), 163501-163501, 2010


2009

VLS-grown silicon nanowire tunnel FET
KE Moselund, H Ghoneim, MT Bjork, H Schmid, S Karg, E Lortscher, W Riess, H Riel
Device Research Conference, pp. 2--24, 2009

Comparison of VLS grown Si NW tunnel FETs with different gate stacks
KE Moselund, H Ghoneim, MT Bjork, H Schmid, S Karg, E Lortscher, W Riess, H Riel
Proceedings of the European Solid State Device Research Conference "ESSDERC'09", pp. 448-451, 2009


2008

Investigation of Strain Profile Optimization in Gate-All-Around Suspended Silicon Nanowire FET
Najmzadeh, Mohammad and Moselund, Kirsten Emilie and Dobrosz, P and Olsen, S and ONeill, A and Ionescu, Mihai Adrian
The 38th European Solid-State Device Research Conference (IEEE ESSDERC 2008)
Abstract

Hysteretic inverter-on-a-body-tied-wire based on less-than-10mV/decade abrupt punch-through impact ionization MOS (PIMOS) switch
KE Moselund, V Pott, D Bouvet, AM Ionescu
VLSI Technology, Systems and Applications, 2008. VLSI-TSA 2008. International Symposium on, pp. 22--23

Nanoscale strain characterisation for ultimate CMOS and beyond
Sarah H Olsen, Peter Dobrosz, Rouzet Agaiby, Yuk Lun Tsang, Olayiwola Alatise, Stephen J Bull, Anthony G O’Neill, Kirsten E Moselund, Adrian M Ionescu, Prashant Majhi, others
Materials Science in Semiconductor Processing 11(5), 271--278, Elsevier, 2008

Prospects for logic-on-a-wire
KE Moselund, D Bouvet, MH Ben Jamaa, David Atienza, Yusuf Leblebici, Giovanni De Micheli, AM Ionescu
Microelectronic Engineering 85(5), 1406--1409, Elsevier, 2008

Punch-through impact ionization MOSFET (PIMOS): From device principle to applications
KE Moselund, D Bouvet, V Pott, C Meinen, M Kayal, AM Ionescu
Solid-State Electronics 52(9), 1336--1344, Elsevier, 2008

Variability-aware design of multilevel logic decoders for nanoscale crossbar memories
MH Ben Jamaa, Kirsten E Moselund, David Atienza, Didier Bouvet, Adrian M Ionescu, Yusuf Leblebici, Giovanni De Micheli
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems 27(11), 2053-2067, 2008

Fabrication and characterization of gate-all-around silicon nanowires on bulk silicon
Vincent Pott, Kirsten E Moselund, Didier Bouvet, Luca De Michielis, Adrian Mihai Ionescu
Nanotechnology, IEEE Transactions on 7(6), 733--744, IEEE, 2008


2007

Cointegration of gate-all-around MOSFETs and local silicon-on-insulator optical waveguides on bulk silicon
Moselund, Kirsten E and Bouvet, Didier and Tschuor, Lucas and Pott, Vincent and Dainesi, Paolo and Eggimann, Christoph and Le Thomas, Nicolas and Houdre, Romuald and Ionescu, Adrian M
IEEE transactions on nanotechnology 6(1), 118--125, IEEE, 2007
Abstract

Fault-tolerant multi-level logic decoder for nanoscale crossbar memory arrays
Jamaa, M Haykel Ben and Atienza, David and De Micheli, Giovanni and Moselund, Kirsten E and Bouvet, Didier and Ionescu, Adrian M and Leblebici, Yusuf
Computer-Aided Design, 2007. ICCAD 2007. IEEE/ACM International Conference on, pp. 765--772
Abstract

Abrupt current switching due to impact ionization effects in Ω-MOSFET on low doped bulk silicon
Kirsten E Moselund, Vincent Pott, Didier Bouvet, Adrian M Ionescu
Solid State Device Research Conference, 2007. ESSDERC 2007. 37th European, pp. 287--290

Bended Gate-All-Around Nanowire MOSFET: a device with enhanced carrier mobility due to oxidation-induced tensile stress
KE Moselund, P Dobrosz, S Olsen, V Pott, L De Michielis, D Tsamados, D Bouvet, A O'Neill, AM Ionescu
Electron Devices Meeting, 2007. IEDM 2007. IEEE International, pp. 191--194


2006

Co-integration of gate-all-around MOSFETs and local silicon-on insulator optical waveguides on bulk silicon for GHz on-chip optical signaling
KE Moselund, L Tschuor, D Bouvet, V Pott, P Dainesi, C Eggimann, N Le Thomas, R Houdr\'e, AM Ionescu
2006 - infoscience.epfl.ch

Low temperature single electron characteristics in gate-all-around MOSFETs
Vincent Pott, Didier Bouvet, Julien Boucart, Lucas Tschuor, Kirsten E Moselund, Adrian M Ionescu
Solid-State Device Research Conference, 2006. ESSDERC 2006. Proceeding of the 36th European, pp. 427--430

Local volume inversion and corner effects in triangular gate-all-around MOSFETs
Kirsten E Moselund, Didier Bouvet, Lucas Tschuor, Vincent Pott, Paolo Dainesi, Adrian M Ionescu
Solid-State Device Research Conference, 2006. ESSDERC 2006. Proceeding of the 36th European, pp. 359--362

Compact gate-all-around silicon light modulator for ultra high speed operation
KE Moselund, P Dainesi, M Declercq, M Bopp, P Coronel, T Skotnicki, AM Ionescu
Sensors and Actuators A: Physical130, 220-227, 2006