Geert Janssen  Geert Janssen photo       

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Formal Methods, Software Design, Deep Learning
Thomas J. Watson Research Center, Yorktown Heights, NY USA
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Professional Associations:  IEEE

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2016

Asset health management using predictive and prescriptive analytics for the electric power grid
A. Goyal, E. Aprilia, G. Janssen, Y. Kim, T. Kumar, R. Mueller, D. Phan, A. Raman, J. Schuddebeurs, J. Xiong, R. Zhang
IBM Journal of Research and Development 60(1), 2016
Abstract


2015

VALIDATION OF EFFECTIVENESS OF VIRTUAL INSTRUMENTATION FOR DISTRIBUTION TRANSFORMERS
Ernauli Aprilia, Tongyou Gu, Bert Hollander, Geert Janssen, Dzung Phan, Jeroen Schuddebeurs, Jinjun Xiong, Yada Zhu
23rd Intl. Conf. and Exhibition on Electricity Distribution, 2015
Abstract


2013

A Case Study of Applying a Novel Asset Maintenance Optimization Methodology to Electricity Distribution Utilities using Simulation Strengthened Analytics
J.D.Schuddebeurs, J. Xiong, R. van Hees, T. Gu, E.C. Aprilia, G. Ditlow, D. Phan, G. Janssen, E. Acar, Y. Zhu
IET Asset Management Conference, 2013
Abstract

IBM Blue Gene/Q memory subsystem with speculative execution and transactional memory
M. Ohmacht, A. Wang, T. Gooding, B. Nathanson, I. Nair, G. Janssen, M. Schaal, B. Steinmacher-Burow
IBM Journal of Research and Development 57(1/2), 2013
Abstract


2009

Multicore power management: Ensuring robustness via early-stage formal verification
Anita Lungu, Pradip Bose, Daniel J Sorin, Steven German, Geert Janssen
Formal Methods and Models for Co-Design, 2009. MEMOCODE'09. 7th IEEE/ACM International Conference on, pp. 78--87


2008

Exploring power management in multi-core systems
Reinaldo A. Bergamaschi, Guoling Han, Alper Buyuktosunoglu, Hiren D. Patel, Indira Nair, Gero Dittmann, Geert Janssen, Nagu R. Dhanwada, Zhigang Hu, Pradip Bose, John A. Darringer
Proceedings of the 13th IEEE/ACM Asia and South Pacific Design Automation Conference (ASP-DAC 2008), pp. 708--713


2007

Scalable sequential equivalence checking across arbitrary design transformations
H Mony, V Paruthi, R Kanzelman, G Janssen
Computer Design, 2006. ICCD 2006. International Conference …, 2007 - ieeexplore.ieee.org

Performance modeling for early analysis of multi-core systems
Reinaldo A. Bergamaschi, Indira Nair, Gero Dittmann, Hiren D. Patel, Geert Janssen, Nagu R. Dhanwada, Alper Buyuktosunoglu, Emrah Acar, Gi-Joon Nam, Dorothy Kucar, Pradip Bose, John A. Darringer, Guoling Han
Proceedings of the 5th IEEE/ACM international conference on hardware/software codesign and system synthesis (CODES+ISSS), pp. 209--214, 2007


2006

A tutorial example of a cache memory protocol and RTL implementation
S German, G Janssen
IBM Research Report, RC23958, Tech. Rep, 2006


2004

Tutorial on verification of distributed cache memory protocols
S German, G Janssen
Formal Methods in Computer Aided Design, 2004 - cs.utah.edu


2003

First CADathlon programming contest held at 2002 ICCAD
S Hassoun, G Janssen
IEEE Design & Test of Computers, 2003 - cs.uic.edu

A consumer report on BDD packages
G Janssen, IBMTJWR Center, NY Yorktown Heights
Integrated Circuits and Systems Design, 2003. SBCCI 2003. …, 2003 - ieeexplore.ieee.org


1999

Logics for Digital Circuit Verification: Theory, Algorithms, and Applications
Geert Janssen
Ph.D. Thesis Eindhoven University, ISBN 90-386-1560-4, Februari 24, 1999


1998

The Eindhoven BDD package, 1998
Geert Janssen
URL, 1998

A Study of BDD Performance in Model Checking
B Yang, RE Bryant, DR OHallaron, A Biere, O …
Formal Methods in Computer Aided Design, 1998

A performance study of BDD-based model checking
B Yang, RE Bryant, DR O'Hallaron, A Biere, O …
Lecture Notes in Computer Science, 1998 - Springer


1995

Exploiting structural similarities in a BDD-based verification method
CAJ Van Eijk, G Janssen
Lecture Notes in Computer Science, 1995 - Springer

Application of BDDs in Formal Verification
G Janssen
Proceedings of the 22 nd International School and Conference …, 1995 - ics.ele.tue.nl


1992

Verification of Finite State Machines using Temporal Logic
Geert Janssen
Third Periodic Progress Report, BRA 3281 ASCIS, Part, 1992

Progress in Verification with PTL
Geert Janssen
Third Periodic Progress Report, BRA 3281 ASCIS, Part, 1992



1989

Circuit Modelling and Animated Interactive Simulation in Escher+
Geert Janssen
Proceedings SCS European Simulation Multiconference, 1989


1986

Higher levels of a silicon compiler
Geert Janssen
EUT report 86-E-163, Eindhoven University of Technology, The Netherlands (for publications not covered by Google Scholar), 1986

Chapter 1: Circuit Description
Geert Janssen
Circuit Analysis, Simulation and Design, Circuit Analysis, Simulation and Design,(ed.A.E. Ruehli), Vol. 3, Part 1, Series Advances in CAD for VLSI,, 1986

Network Description & Modelling Language - NDML
Geert Janssen
The Integrated Circuit Design Book, The Integrated Circuit Design Book (ed. E P. DeWilde), Delft University Press, 1986


Year Unknown