Bucknell C. Webb  Bucknell C. Webb photo       

contact information

Health Sciences Gadgeteer/modeler
Thomas J. Watson Research Center, Yorktown Heights, NY USA
  +1dash914dash945dash1597

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2012

Integrated on-chip inductors with electroplated magnetic yokes
Naigang Wang, Eugene J O’Sullivan, Philipp Herget, Bipin Rajendran, Leslie E Krupp, Lubomyr T Romankiw, Bucknell C Webb, Robert Fontana, Elizabeth A Duch, Eric A Joseph, others
Journal of Applied Physics 111(7), 07E732, AIP Publishing, 2012


2011

Electromagnetic-SPICE modeling and analysis of 3D power network
Z. Xu, J. Q. Lu, B. C. Webb, J. U. Knickerbocker
2011 IEEE 61st Electronic Components and Technology Conference (ECTC), pp. 2171-2178


2008

Characterization of stacked die using die-to-wafer integration for high yield and throughput
K. Sakuma, P. S. Andry, C. K. Tsang, K. Sueoka, Y. Oyama, C. Patel, B. Dang, S. L. Wright, B. C. Webb, E. Sprogis, R. Polastre, R. Horton, J. U. Knickerbocker
2008 58th Electronic Components and Technology Conference, pp. 18-23

3D silicon integration
J. U. Knickerbocker, P. S. Andry, B. Dang, R. R. Horton, C. S. Patel, R. J. Polastre, K. Sakuma, E. S. Sprogis, C. K. Tsang, B. C. Webb, S. L. Wright
2008 58th Electronic Components and Technology Conference, pp. 538-543

Fabrication and characterization of robust through-silicon vias for silicon-carrier applications
PS Andry, CK Tsang, BC Webb, EJ Sprogis, SL Wright, B Dang, DG Manzer
IBM Journal of Research and Development 52(6), 571--581, IBM Corp., 2008

Three-dimensional silicon integration
J. U. Knickerbocker, P. S. Andry, B. Dang, R. R. Horton, M. J. Interrante, C. S. Patel, R. J. Polastre, K. Sakuma, R. Sirdeshmukh, E. J. Sprogis, S. M. Sri-Jayantha, A. M. Stephens, A. W. Topol, C. K. Tsang, B. C. Webb, S. L. Wright
IBM Journal of Research and Development 52(6), 553-569, 2008

3D chip stacking with C4 technology
B. Dang, S. L. Wright, P. S. Andry, E. J. Sprogis, C. K. Tsang, M. J. Interrante, B. C. Webb, R. J. Polastre, R. R. Horton, C. S. Patel, A. Sharma, J. Zheng, K. Sakuma, J. U. Knickerbocker
IBM Journal of Research and Development 52(6), 599-609, 2008

3D chip-stacking technology with through-silicon vias and low-volume lead-free interconnections
Katsuyuki Sakuma, Paul S Andry, Cornelia K Tsang, Steven L Wright, Bing Dang, Chirag S Patel, Bucknell C Webb, J Maria, Edmund J Sprogis, SK Kang, others
IBM Journal of Research and Development 52(6), 611--622, IBM, 2008


2007

3D chip stacking technology with low-volume lead-free interconnections
K Sakuma, PS Andry, B Dang, J Maria, CK Tsang, C Patel, SL Wright, B Webb, E Sprogis, SK Kang, others
2007 Proceedings 57th Electronic Components and Technology Conference, pp. 627--632

Assembly, Characterization, and Reworkability of Pb-free Ultra-Fine Pitch C4s for System-on-Package
B. Dang, S. L. Wright, P. S. Andry, C. K. Tsang, C. Patel, R. Polastre, R. Horton, K. Sakuma, B. C. Webb, E. Sprogis, G. Zhang, A. Sharma, J. U. Knickerbocker
2007 Proceedings 57th Electronic Components and Technology Conference, pp. 42-48

Silicon carrier having increased flexibility
B C Webb
US Patent App. 11/932,891, 2007 - Google Patents, Google Patents
US Patent App. 11/932,891

CMOS-Compatible Through Silicon Vias for 3-D Process Integration
C K Tsang, P S Andry, E J Sprogis, C S Patel, B C Webb, D G Manzer, J U Knickerbocker
MATERIALS RESEARCH SOCIETY SYMPOSIUM PROCEEDINGS, pp. 145, 2007


2006

System-on-package (SOP) technology, characterization and applications
J. U. Knickerbocker, P. S. Andry, L. P. Buchwalter, E. G. Colgan, J. Cotte, H. Gan, R. R. Horton, S. M. Sri-Jayantha, J. H. Magerlein, D. Manzer, G. McVicker, C. S. Patel, R. J. Polastre, E. S. Sprogis, C. K. Tsang, B. C. Webb, S. L. Wright
56th Electronic Components and Technology Conference 2006, pp. 7 pp.-

A CMOS-compatible process for fabricating electrical through-vias in silicon
P. S. Andry, C. Tsang, E. Sprogis, C. Patel, S. L. Wright, B. C. Webb, L. P. Buchwalter, D. Manzer, R. Horton, R. Polastre, J. Knickerbocker
56th Electronic Components and Technology Conference 2006, pp. 7 pp.-


2005

Compliant thermal interface structure with vapor chamber
J P Karidis, M Schultz, B C Webb
US Patent App. 11/151,831, 2005 - Google Patents, Google Patents
US Patent App. 11/151,831

Compliant thermal interface structure utilizing spring elements with fins
J P Karidis, M D Schultz, B C Webb
US Patent App. 11/151,843, 2005 - Google Patents, Google Patents
US Patent App. 11/151,843

Development of next-generation system-on-package (SOP) technology based on silicon carriers with fine-pitch chip interconnection
J. U. Knickerbocker, P. S. Andry, L. P. Buchwalter, A. Deutsch, R. R. Horton, K. A. Jenkins, Y. H. Kwark, G. McVicker, C. S. Patel, R. J. Polastre, C. D. Schuster, A. Sharma, S. M. Sri-Jayantha, C. W. Surovic, C. K. Tsang, B. C. Webb, S. L. Wright, S. R.
IBM Journal of Research and Development 49(4.5), 725-753, 2005

Packaging-Development of next-generation system-on-package (SOP) technology based on silicon carriers with fine-pitch chip interconnection
JU Knickerbocker, PS Andry, LP Buchwalter, A Deutsch, RR Horton, KA Jenkins, YH Kwark, G McVicker, CS Patel, RJ Polastre, others
IBM Journal of Research and Development 49(4-5), 725--754, [Armonk, NY]: International Business Machines Corp., 2005


2002

Advanced write heads for high density and high data rate recording
S W Yuan, E Lee, W Hsiao, H Santini, H Lam, G Sui, T Lam, Y Luo, M Madison, V Nikitin, others
Magnetics, IEEE Transactions on 38(5), 1873--1878, IEEE, 2002

Self-servo-writing multi-slot timing pattern
T J Chainer, M D Schultz, B C Webb
US Patent App. 10/184,343, 2002 - Google Patents, Google Patents
US Patent App. 10/184,343

Method for self-servowriting timing propagation
M D Schultz, B C Webb
US Patent 6,429,989, 2002 - Google Patents, Google Patents
US Patent 6,429,989

Method and system for accurate self-servowriting with normalization in a disk drive
T Chainer, M D Schultz, B C Webb, E J Yarmchuk
US Patent 6,469,859, 2002 - Google Patents, Google Patents
US Patent 6,469,859


2001

Method for storage of self-servowriting timing information
T J Chainer, M D Schultz, B C Webb, E J Yarmchuk
US Patent App. 09/ ..., 2001 - Google Patents, Google Patents
US Patent App. 09/774,914

A self-servowrite clocking process
MD Schultz, EJ Yarmchuk, BC Webb, TJ Chainer
IEEE Transactions on Magnetics 37(4 Part 1), 1878--1880, 2001

Trigger pattern detection method and apparatus
T J Chainer, M D Schultz, B C Webb, E J Yarmchuk
US Patent 6,259,574, 2001 - Google Patents, Google Patents
US Patent 6,259,574


1999

Methods and systems for self-servo-writing including writing positioning and timing bursts at different track pitches
T J Chainer, M D Schultz, B C Webb, E J Yarmchuk
US Patent 6,005,738, 1999 - Google Patents, Google Patents
US Patent 6,005,738


1998

Self-servowriting system with dynamic error propagation reduction
T Chainer, M D Schultz, B C Webb, E J Yarmchuk
US Patent 5,793,554, 1998 - Google Patents, Google Patents
US Patent 5,793,554


1997

Radial self-propagation pattern generation for disk file servowriting
E J Yarmchuk, M D Schultz, B C Webb, T J Chainer
US Patent 5,612,833, 1997 - Google Patents, Google Patents
US Patent 5,612,833


1996

Improvements in self-servowriting timing pattern generation
T J Chainer, A P Praino, M D Schultz, B C WEBB, E J Yarmchuk
1996 - freepatentsonline.com


1992


High field, high frequency magnetic dynamics of narrow thin-film magnetic multilayer stripes
B C Webb, M E Re, C V Jahnes, M A Russak
Journal of Magnetism and Magnetic Materials104, 973--974, 1992

Simple model of the high frequency permeability of narrow thin-filmstructures with eddy currents, walls, and saturation
BC Webb, ME Re, CV Jahnes, MA Russak
IEEE Transactions on Magnetics 28(5 Part 2), 2955--2957, 1992

Thin film magnetic head having interspersed resistance layers to provide a desired cut-off frequency
M E Re, M A Russak, B C Webb
US Patent 5,142,426, 1992 - Google Patents, Google Patents
US Patent 5,142,426


1991

Magnetic and structural characterization of sputtered FeN multilayer films
M A Russak, C V Jahnes, E Klokholm, J W Lee, M E Re, B C Webb
Journal of applied physics 70(10), 6427--6429, AIP, 1991

High-frequency permeability of laminated and unlaminated, narrow, thin-film magnetic stripes
B C Webb, M E Re, C V Jahnes, M A Russak
Journal of Applied Physics 69(8), 5611--5615, AIP, 1991


1990

Interference resonances in the permeability of laminated magnetic thin films
B C Webb, M E Re, M A Russak, C V Jahnes
Journal of applied physics 68(8), 4290--4293, AIP, 1990

Magnetics and microstructure of sputtered Ni 80 Fe 20/SiO 2 multilayer films
MA Russak, CV Jahnes, ME Re, BC Webb, SM Mirzamaani
IEEE Transactions on Magnetics 26(5), 2332--2334, 1990

Magnetics and microstructure of sputtered Ni/sub 80/Fe/sub 20//SiO/sub 2/multilayer films
MA Russak, CV Jahnes, ME Re, BC Webb, SM Mirzamaani
Magnetics Conference, 1990



1988




1986

Observation of an Energy-and Temperature-Dependent Carrier Mass for Mixed-Valence CePd\_ $\{$3$\}$
BC Webb, AJ Sievers, T Mihalisin
Physical review letters 57(15), 1951--1954, APS, 1986


1984



1972

SPUTTERED FeN BASED MATERIALS FOR HIGH DENSITY RECORDING APPLICATIONS
A Russak, C V Jahnes, J W Lee, M E Re, B O C Webb, E Klokholm
Extended abstracts, pp. 387, 1972


Year Unknown

ISSCC 2012/SESSION 23/ADVANCES IN HETEROGENEOUS INTEGRATION/23.1
N Sturcken, E O’Sullivan, N Wang, P Herget, B Webb, L Romankiw, M Petracca, R Davies, R Fontana, G Decad, others
bioeeserv.ee.columbia.edu, 0

3D chip-stacking technology with through-silicon vias and low-volume lead-free interconnections-Author Bios
K Sakuma, PS Andry, CK Tsang, SL Wright, B Dang, CS Patel, BC Webb, J Maria, EJ Sprogis, SK Kang, others
K Sakuma, PS Andry, CK Tsang, SL Wright, B Dang, ..., 0

Fabrication and characterization of robust through-silicon vias for silicon-carrier applications-Author Bios
P S Andry, C K Tsang, B C Webb, E J Sprogis, S L Wright, B Dang, D G Manzer
PS Andry, CK Tsang, BC Webb , EJ Sprogis, SL Wright, ..., 0

Fabrication and characterization of robust through-silicon vias for silicon-carrier applications-References
PS Andry, CK Tsang, BC Webb, EJ Sprogis, SL Wright, B Dang, DG Manzer
PS Andry, CK Tsang, BC Webb , EJ Sprogis, SL Wright, ..., 0

3D chip stacking with C4 technology-Author Bios
B Dang, S L Wright, P S Andry, E J Sprogis, C K Tsang, M J Interrante, B C Webb, R J Polastre, R R Horton, C S Patel
... , CK Tsang, MJ Interrante, BC Webb , RJ Polastre, RR ..., 0

Three-dimensional silicon integration-References
JU Knickerbocker, PS Andry, B Dang, RR Horton, MJ Interrante, CS Patel, RJ Polastre, K Sakuma, R Sirdeshmukh, EJ Sprogis, others
... , AM Stephens, AW Topol, CK Tsang, BC Webb , SL ..., 0


3D chip stacking with C4 technology-References
B Dang, SL Wright, PS Andry, EJ Sprogis, CK Tsang, MJ Interrante, BC Webb, RJ Polastre, RR Horton, CS Patel, others
... , CK Tsang, MJ Interrante, BC Webb , RJ Polastre, RR ..., 0

3D chip-stacking technology with through-silicon vias and low-volume lead-free interconnections-References
K Sakuma, PS Andry, CK Tsang, SL Wright, B Dang, CS Patel, BC Webb, J Maria, EJ Sprogis, SK Kang, others
K Sakuma, PS Andry, CK Tsang, SL Wright, B Dang, ..., 0




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