Previously, Dr. Dittmann was a senior verification engineer with the IBM Systems & Technology Group in Böblingen, Germany, working on formal, structural, and random verification and on system-level modeling of high-performance processors. Prior to that, he was a Research Staff Member at the IBM T.J. Watson Research Center, Yorktown Heights, USA, investigating system-level power and performance modeling and power-management algorithms. He started his career at the IBM Zurich Research Laboratory, Switzerland. There he developed hardware implementations of network protocols and synthesis algorithms for specialized processors, contributing to a new architecture for network processors.
Dr. Dittmann holds a Ph.D. in Computer Engineering from the Swiss Federal Institute of Technology (ETH), Zurich, and a Dipl.-Ing. degree in Electrical Engineering (MSEE) from Darmstadt University of Technology, Germany. He has served on the organizing committee of ASAP'14, the TPCs of DAC, DATE and CODES-ISSS (session and track chair), and as a reviewer for the NSF and the European Commission. He is a Senior Member of the IEEE.