Hans Jacobson received his M.S. degree in Computer Engineering from University of Lulea, Sweden, in 1996 and his Ph.D. degree in Computer Science from University of Utah in 2004. He has been with the Design Automation and Microarchitecture departments at IBM T. J. Watson Research Center since 2001. Dr. Jacobson has developed power modeling methodologies and tools currently in use in IBM microprocessor design, and has been part of the power modeling, design, and verification of several IBM microprocessors and test chips. He is currently leading the power modeling work on a future IBM processor chip. His research interests are in advanced pipelining and clocking techniques, power efficient micro-architectures and circuits, and early stage power modeling.