He received his BS and MS degrees in information science from Tohoku University, Japan, in 1996 and 1998, respectively. He joined IBM Research, Tokyo Research Laboratory, in 1998, and had involved in cryptographic hardware design and rapid prototyping for verification project. He is now working on baseband technology research for wireless system.
Research InterestAccelerator logic design ( public key cryptography, digital baseband for wireless system, digital filter )
HW system verification
AwardsBest Paper Award for Young Researchers of the National Convention of IPSJ (Information Processing Society of Japan), "Small Hardware Architecture for New Standard Block Cipher AES," The 63rd National Convention of IPSJ.
Encouragement Prize at the 18th Workshop on Circuits and Systems in Karuizawa, "Hardware Design Verification Using Signal Transitions and Transactions," The 18th Workshop on Circuits and Systems in Karuizawa.
Best Paper Award, "A low-intrusive real-time observation method for tracing function transitions of concurrent programs in embedded systems," Embedded Systems Symposium 2007