Schuyler is a postdoctoral researcher with the Reliability and Power-Aware Microarchitecture group. His research interests encompass hardware/software co-design of accelerators with a focus on machine learning acceleration. These interests often overlap with a committment to open-source hardware development in the RISC-V ecosystem and the use of new, modern tools for design automation like Chisel and FIRRTL.
Schuyler received a Ph.D in Computer Engineering from Boston University in 2016 where his thesis focused on a simultaneous multithreaded model of neural network computation with a hardware accelerator demonstrating this model. Much of this work is avabile as open source hardware.